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DTSTART;TZID=America/Los_Angeles:20240424T080000
DTEND;TZID=America/Los_Angeles:20240424T170000
DTSTAMP:20240325T163321Z
CREATED:20240325T163321Z
LAST-MODIFIED:20240325T163321Z
UID:7759-1713945600-1713978000@marketingeda.com
SUMMARY:TSMC 2024 Technology Symposium - North America
DESCRIPTION:Learn about:\n\nTSMC’s industry-leading HPC\, smartphone\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm\, 2nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric™ advanced packaging technology advancement on InFO\, CoWoS®\, and TSMC-SoIC®\nTSMC’s manufacturing excellence\, capacity expansion plans\, and green manufacturing achievements\nTSMC’s Open Innovation Platform® ecosystem to speed up time-to-design
URL:https://marketingeda.com/event/tsmc-2024-technology-symposium-north-america/
LOCATION:Santa Clara Convention Center\, 5001 Great America Parkway\, Santa Clara\, CA\, 95054\, United States
CATEGORIES:Foundry,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/TSMC-2024-North-America.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20240321T100000
DTEND;TZID=America/Los_Angeles:20240321T153000
DTSTAMP:20240222T182630Z
CREATED:20240222T182630Z
LAST-MODIFIED:20240222T182630Z
UID:7686-1711015200-1711035000@marketingeda.com
SUMMARY:AI-Powered Electromagnetics Symposium
DESCRIPTION:Accelerate Your Designs with Generative AI-Powered Multiphysics Analysis and Optimization \nHow are you addressing the ever-increasing complexity and density of your high-performance electronic systems? What role do electromagnetic effects such as electromagnetic interference (EMI)\, electromagnetic compatibility (EMC)\, power integrity\, and signal integrity play? \nDiscover how Cadence is transforming electromagnetic (EM) simulation for optimal design performance with innovative\, AI-driven multiphysics optimization software and breakthrough 3D EM analysis. \nJoin our CadenceCONNECT: AI-Powered EM Symposium\, where industry experts\, including Cadence\, Meta\, Microsoft\, and more\, will share insights highlighting how the Cadence Clarity 3D Solver and Optimality Intelligent Explorer workflow streamlines design results in optimized electronic product designs. \n\n\n\n\n\n\n\n\n\n\n\n\nAgenda \n10:00am – 10:30am               Registration | Light Breakfast \n10:30am – 12:00pm               Morning Sessions \n12:00pm – 1:00pm                 Lunch | Live Demonstrations \n1:00pm – 2:30pm                   Afternoon Sessions \n2:30pm – 3:30pm                   Networking Event | Live Demonstrations
URL:https://marketingeda.com/event/ai-powered-electromagnetics-symposium/
LOCATION:Cadence Design Systems\, Building 5\, 2655 Seely Avenue\, San Jose\, CA\, 95131\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/Cadence-March-21-2024.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20240215T123000
DTEND;TZID=Asia/Kolkata:20240215T170000
DTSTAMP:20240207T181103Z
CREATED:20240207T181103Z
LAST-MODIFIED:20240207T181103Z
UID:7591-1708000200-1708016400@marketingeda.com
SUMMARY:SiFive RISC-V Day
DESCRIPTION:Leadership in the RISC-V Era: India’s Exciting New Opportunity\nJoin SiFive for an informative afternoon session\, featuring key thought leaders in the fast -growing global RISC-V ecosystem. Krste Asanovic\, inventor of RISC-V and SiFive founder will be joined by academic and business leaders to provide an overview of RISC-V and the latest advances as well as talk about how RISC-V is a great opportunity for India to leap ahead in semiconductor technology leadership. \nIndia’s strengths in software and hardware design are helping it jump ahead as RISC-V takes hold around the world\, but the open standard brings a lot of competition from other regions. Our guests will discuss India’s strengths and talk about advances to date and how the country\, and the companies doing business here should think about the opportunities ahead. \nJoin us for SiFive RISC-V Day India on February 15\, 2024. Attend this free event to meet the pioneers driving RISC-V. A networking lunch will be held before the event. Don’t miss out!
URL:https://marketingeda.com/event/sifive-risc-v-day/
LOCATION:Hilton Bangalore Embassy GolfLinks\, Embassy Golf Links Business Park\, Bangalore\, 560071\, India
CATEGORIES:IP,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/SiFive-February-15-2024.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20231112T080000
DTEND;TZID=America/Los_Angeles:20231116T170000
DTSTAMP:20231031T163704Z
CREATED:20231031T163344Z
LAST-MODIFIED:20231031T163704Z
UID:7015-1699776000-1700154000@marketingeda.com
SUMMARY:ISTFA 2023
DESCRIPTION:Saving global resources by increasing energy efficiency is among the most significant problems that global society must address today. To achieve this\, a major target is developing efficient and reliable power electronics devices for providing the required high-performing hardware components. Power semiconductors based on silicon carbide (SiC) and gallium nitride (GaN) technologies are becoming increasingly important since they allow smaller sizes\, lighter weight\, lower costs\, and higher efficiency of power electronics systems. For these innovative components\, there are still many issues to be resolved regarding the lack of robustness and reliability. This arises from significant failure risks during manufacturing and consequently may form roadblocking obstacles on the way to the mass market. The complexity of highly integrated SiC and GaN devices requires an in-depth understanding of defect formation and degradation mechanisms as well as adapted failure analysis methodologies. \nShare your experiences and advance the industry and your career at the 49th International Symposium for Testing and Failure Analysis\, the premier event for the microelectronics failure analysis community. We invite you to submit your work for publication and to present to the industry in Phoenix\, Arizona\, for the 49th year of ISTFA. \nKey Topics: \n\nAI Applications for Failure Analysis\nBoards and Systems\nCase Studies: Device Analysis\nCase Studies: FA Process and workflows\nDetecting and Preventing Counterfeit Microelectronics\nDie Level Fault Isolation\nEmerging FA Techniques and Concepts\nFIB Circuit Edit\nFIB Sample Preparation\nHardware Security & Counterfeiting\nMicroscopy Analysis and Material Characterization\nNanoprobing and Electrical Characterization\nPackage Level Fault Isolation\nPackaging and Assembly\nESD/EOS Failure Analysis\nPower Devices (Si\, SiC\, GaN)\nProduct Yield\, Test and Diagnostics\nSample Preparation and Device De-processing\nScanning Probe Analysis\nSystem in Package and 3D Devices\n\nKeynote Session\n \nDr. Peter Friedrichs\, Vice President SiC Infineon\nTuesday\, November 14 at 8:30 a.m.\nExhibit Halls – West Hall 1-2 – Industry Forum \nWide band gap power devices and related robustness and reliability aspects\nSilicon carbide (SiC) devices offer many advantages\, especially in power-conversion circuits for applications where efficiency is at a premium. These include solar inverters and electric vehicles\, which may also be expected to remain in service for decades. For these applications\, a combination of very high efficiency and long-term reliability is essential. The challenge in deploying SiC in such applications is that the technology is at an earlier stage of development than silicon. This means that the best ways of deploying SiC are still being explored\, and that some failure modes unique to SiC devices still need to be better understood and more effectively mitigated. Infineon has been working on these issues for years and so has the insights and experience necessary to both help customers deploy SiC devices to their advantage\, and to understand and mitigate their failure mechanisms to ensure the necessary reliability. The contribution will give insides into specific aspects regarding long term reliability and failure modes of sic power devices\, taking into account application relevant mission profiles.
URL:https://marketingeda.com/event/istfa-2023/
LOCATION:Phoenix Convention Center\, 100 North Third Street\, Phoenix\, AZ\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/ISTFA-2023.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Jerusalem:20231010T083000
DTEND;TZID=Asia/Jerusalem:20231010T164500
DTSTAMP:20230918T202326Z
CREATED:20230918T202326Z
LAST-MODIFIED:20230918T202326Z
UID:6814-1696926600-1696956300@marketingeda.com
SUMMARY:Synopsys Verification Technical Symposium 2023 - Israel
DESCRIPTION:Join us for a day filled with insights\, innovation\, and networking in the semiconductor industry. \nThe verification landscape is evolving\, and we’re here to help you navigate it. At this symposium\, we’ll be going through some of the most challenging use cases in chip design today\, while exploring best practices and the latest innovations for each use case. \nHere’s what’s on the agenda:\n– General sessions\, including an Executive Keynote.\n– Topics covering Power Efficiency\, Protocols\, and Cloud Solutions.\n– Choose between two tracks: Software (simulation\, static\, formal) and Hardware (emulation and prototyping). \nIf you have any immediate questions\, please feel free to reach out to us at verificationts@synopsys.com.
URL:https://marketingeda.com/event/synopsys-verification-technical-symposium-2023-israel/
LOCATION:Daniel Herzliya Hotel\, Ramat Yam St 60\, Herzliya\, Israel
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/Synopsys-October-10-2023.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Tokyo:20230630T080000
DTEND;TZID=Asia/Tokyo:20230630T170000
DTSTAMP:20230621T194040Z
CREATED:20230621T193324Z
LAST-MODIFIED:20230621T194040Z
UID:6557-1688112000-1688144400@marketingeda.com
SUMMARY:TSMC 2023 Technology Symposium - Japan
DESCRIPTION:Japan Technology Symposium\n\nDate\nFriday\, June 30\nTime\n9:30 a.m. – 5:20 p.m.\nVenue\nThe Yokohama Bay Hotel Tokyu\n2-3-7\, Minatomirai\, Nishi-ku\, Yokohama 220-8543\nRegistration will be closed on 6/21. Seats are limited.\n\nVoD (Video on Demand) will be available starting from 7/21.\nRegistration will close on 7/12. \nGet the latest on:\n\nTSMC’s smartphone\, HPC\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm\, 2nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric™ advanced packaging technology advancement on InFO\, CoWoS®\, and SoIC\nTSMC’s manufacturing excellence\, capacity expansion plan\, and green manufacturing achievement\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design
URL:https://marketingeda.com/event/tsmc-2023-technology-symposium-japan/
LOCATION:The Yokohama Bay Hotel Tokyu\, 2-3-7\, Minatomirai\, Nishi-ku\, Yokohama\, Japan
CATEGORIES:Foundry,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/TSMC-2023-Japan.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Tokyo:20230611T080000
DTEND;TZID=Asia/Tokyo:20230616T170000
DTSTAMP:20230228T182652Z
CREATED:20230228T182652Z
LAST-MODIFIED:20230228T182652Z
UID:6035-1686470400-1686934800@marketingeda.com
SUMMARY:2023 Symposium on VLSI Technology and Circuits
DESCRIPTION:VLSI Symposium is an international conference on semiconductor technology and circuits that offers an opportunity to interact and synergize on topics spanning the range from process technology to system-on-chip. \nWe appreciate you to visit the VLSI symposium website. We also would like to invite you to join “2023 Symposium on VLSI technology and Circuits\,” which will be held from Sunday\, June 11 to Friday\, June 16 at Rihga Royal Hotel Kyoto in Japan. 2023 Symposium is planned as a fully in-person event in Kyoto for the first time in four years. On-demand access to technical papers will be available for people who cannot travel to Kyoto. We keep monitoring the COVID-19 pandemic and will inform you any changes in the symposium program. \nAbout the Symposium\nProfessors Shoji Tanaka and Walter Kosonocky\, founders of the Symposium\, first organized the VLSI Technology Symposium in 1981 with the hope of offering an opportunity for world’s top technologists to engage in an open exchange of ideas on what was quickly becoming a revolution in the world’s industrial capability. Since then\, the Symposium has been held annually and has grown to be an important and valuable event for people working in the VLSI business. The presentation of high-quality papers has made it possible for attendees to learn about new directions in the development of VLSI technology. The friendly atmosphere has made this an enjoyable learning experience. \nThe Symposium on VLSI Technology has alternated each year between sites in US and Japan. In 1987\, the first Symposium on VLSI Circuits was held in conjunction with the Technology Symposium in recognition of the growing interest to provide the same small but intense and open forum for discussing circuit and system implementations. Since then\, this annual meeting has increased its value over the past 30 years. We are confident that so many new technologies and circuits were introduced in the past Symposia and thus have contributed to the prosperity of the world. Its sponsors continue to be the IEEE Electron Devices Society and Solid-State Circuits Society\, and the Japan Society of Applied Physics in cooperation with the Institute of Electronics\, Information and Communication Engineers. \nFor many reasons\, these meetings have remained linked for the past years to provide opportunities for technology people and circuit and system designers to interact with each other. These interactions are augmented with short courses\, invited speakers and several evening panel discussions\, Forums\, Workshops. In recognition of the efforts of organizers\, authors and participants to make the Symposia successful\, there is ample banquet and entertainment prearranged. \nIn its 42nd year of delivering a unique convergence of technology and circuits for the microelectronics industry\, the 2022 Symposium on VLSI Technology & Circuits had been merged into one Symposium to maximize the synergy across both domains. \nAfter the 2020 meeting had been held in a fully virtual format due to COVID-19\, the 2022 meeting was held in Honolulu\, Hawaii. This year it will be returning to the RIHGA Royal Hotel in Kyoto\, Japan in June of 2023. \nDATE AND LOCATION\nThe 2023 Symposium on VLSI Technology and Circuits will be held on June 11-16\, 2023\, JST respectively.\nAll the meetings will be held at RIHGA Royal Hotel Kyoto\, Horikawa Shiokoji\, Shimogyo ku \, Kyoto 600 8237\, Japan. \nHeld as a six-day at the Rihga Royal Hotel\, as well as selected presentations and panel sessions\, the Symposium will feature advanced VLSI technology developments\, innovative circuit designs\, and the applications they enable\, such as artificial intelligence\, machine learning\, IoT\, wearable/implantable biomedical applications\, big data\, cloud / edge computing\, virtual reality (VR) / augmented reality (AR)\, robotics\, and autonomous vehicles. \nThe weeklong Symposium will continue its reputation as the microelectronics industry’s premiere international conference integrating technology\, circuits\, and systems with a range and scope unlike any other conferences. In addition to the technical presentations\, the Symposium program will feature a demonstration session\, evening panel discussions\, joint focus sessions\, short courses\, workshops\, and a special forum session that provides a focused discussion on a specific topic relevant to the Symposium theme.
URL:https://marketingeda.com/event/2023-symposium-on-vlsi-technology-and-circuits/
LOCATION:Rihga Royal Hotel\, Kyoto\, Japan
CATEGORIES:IP,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/2023-Symposium.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/New_York:20230508T080000
DTEND;TZID=America/New_York:20230510T170000
DTSTAMP:20230508T022819Z
CREATED:20230508T022819Z
LAST-MODIFIED:20230508T022819Z
UID:6363-1683532800-1683738000@marketingeda.com
SUMMARY:The 32nd Microelectronics Design and Test Symposium (MDTS 2023)
DESCRIPTION:Theme\n\nArtificial Intelligence\, Machine Learning\, and Deep Learning: Tactical and Strategic Impacts to Microelectronics Design and Test \nAbout MDTS 2023\nThe IEEE Microelectronics Design & Test Symposium (MDTS) provides a forum for academic and industry researchers and engineers to discuss the latest advances in microelectronics\, share their visions in modern microelectronic technologies\, and foster academic-industry collaboration.  The 32nd MDTS features artificial intelligence (AI)\, machine learning (ML)\, and deep learning (DL).  AI/ML/DL algorithms can be used to improve design and test by evaluating the accuracy and effectiveness of models\, design rules\, and test coverage.  In addition\, new circuits and chip architectures for AI/ML/DL applications are emerging\, presenting new challenges to design and test in the form of reticle-size die\, chiplets\, and hardware/software co-design.
URL:https://marketingeda.com/event/the-32nd-microelectronics-design-and-test-symposium-mdts-2023/
LOCATION:Crowne Plaza – Desmond Hotel\, 660 Albany Shaker Rd\, Albany\, NY\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/MDTS-2023.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20230426T080000
DTEND;TZID=America/Los_Angeles:20230426T170000
DTSTAMP:20230404T195733Z
CREATED:20230404T195733Z
LAST-MODIFIED:20230404T195733Z
UID:6230-1682496000-1682528400@marketingeda.com
SUMMARY:TSMC - North America Technology Symposium
DESCRIPTION:Join us and learn about:\n\nTSMC’s smartphone\, HPC\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm\, 2nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric™ advanced packaging technology advancement on InFO\, CoWoS®\, and SoIC\nTSMC’s manufacturing excellence\, capacity expansion plan\, and green manufacturing achievement\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design
URL:https://marketingeda.com/event/tsmc-north-america-technology-symposium/
LOCATION:Santa Clara Convention Center\, 5001 Great America Parkway\, Santa Clara\, CA\, 95054\, United States
CATEGORIES:Semiconductor,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/TSMC-2023-Technology-Symposium.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20230418T100000
DTEND;TZID=America/Los_Angeles:20230418T170000
DTSTAMP:20230314T174241Z
CREATED:20230314T174241Z
LAST-MODIFIED:20230314T174241Z
UID:6148-1681812000-1681837200@marketingeda.com
SUMMARY:Static Sign-Off Symposium 2023
DESCRIPTION:Advanced Static Sign-Off Methodologies\n\n\nLeading SoC designers will share their advanced static sign-off methodologies and best practices to support first-silicon design goals\, along with results achieved in accelerating early functional verification and sign-off of digital designs. \nTopics will include: AI/ML\, targeted sign-off\, incremental sign-off\, multimode\, hierarchical\, dynamic CDC\, and more. \nAdvanced Static Sign-Off Methodology Presenters: \n\nRaj Khanna – Esperanto\nIgor Arsovski – Groq\nLouis Cardillo – NVIDIA\nPrakash Narain – Real Intent\nYC Lee – Samsung Electronics\nZeev Brunin – Speedata\n\nStatic sign-off domains covered: \n\nRTL linting\nClock domain crossing (CDC)\nReset domain crossing (RDC)\nDesign for Test (DFT)\nConnectivity & glitch\n\nFollowing the methodology discussions\, there will be a panel covering: \nMaximizing Design Efficiency with Static Sign-Off Methods
URL:https://marketingeda.com/event/static-sign-off-symposium-2023/
LOCATION:DoubleTree Hotel\, 2050 Gateway Place\, San Jose\, CA\, 95110\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/Real-Intent-2023.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20230326T080000
DTEND;TZID=America/Los_Angeles:20230329T170000
DTSTAMP:20230310T181227Z
CREATED:20230310T181227Z
LAST-MODIFIED:20230310T181227Z
UID:6101-1679817600-1680109200@marketingeda.com
SUMMARY:International Symposium on Physical Design (ISPD) 2023
DESCRIPTION:General Information\nThe International Symposium on Physical Design (ISPD) provides a premier forum to exchange ideas and promote innovative research in all aspects of physical design ranging from traditional topics for ASIC and FPGA designs to emerging technologies that impact physical design of integrated circuits (ICs). In 2023\, ISPD will be online with virtual participation\, with both live video and recorded sessions. The 32nd symposium will highlight key new directions and leading-edge theoretical and experimental contributions to the field. \nWe will also pay tribute to Professor Malgorzata Marek-Sadowska (University of California at Santa Barbara) for her contributions to the physical design community. \n  \nRegistration is now open. Please register here.\n  \nLocation\nISPD 2023 will be held online\, with virtual participation across the world. There is a strong technical program including peer-reviewed papers\, invited papers\, and keynotes. Continuing the tradition of ISPD\, we have a contest and a great social program. \nImportant Dates\n\n\n\nContest registration deadline\nJanuary 15\, 2023\n\n\nCamera-ready paper or abstract + bio for invited speakers\nJanuary 29\, 2023\n\n\nSpeaker presentation videos due\nFebruary 26\, 2023\n\n\nSymposium\nMarch 26-29\, 2023\n\n\n\nSponsors\n\n\n\n\nSponsor\n\n\n\n\n\nTechnical Sponsors\n\n\n\n\n\n\nSupporters\n\n\n\n\nGold\n\n\n\n\n\n\n\nSilver
URL:https://marketingeda.com/event/international-symposium-on-physical-design-ispd-2023/
CATEGORIES:EDA,IP,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/ISPD-2023.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20230313T080000
DTEND;TZID=America/Los_Angeles:20230317T170000
DTSTAMP:20230302T002531Z
CREATED:20230302T002531Z
LAST-MODIFIED:20230302T002531Z
UID:6053-1678694400-1679072400@marketingeda.com
SUMMARY:SEMI-THERM
DESCRIPTION:SEMI-THERM is an international symposium dedicated to the thermal management and characterization of electronic components and systems. SEMI-THERM provides knowledge covering all thermal scales from integrated circuits to facilities\, fosters discussions between thermal engineers\, professionals\, and industry experts\, and encourages the exchange of information on academic and industrial advances in electronics cooling. \n\n\nSymposium Highlights\n\n\n\nTechnical Sessions\nTechnical Short Courses\nTutorials\nVendor Exhibits\nVendor Workshops\nProduct Tear Downs\nPanel Discussions\nPoster / Dialog Session\n\n\n\nClick the Detailed Agenda button below to see the current details of the technical sessions and short courses. Additions to the schedule\, including the Keynote Presentation\, How-to Courses\, Panel Discussions\, and Industry Awards will be updated as available.
URL:https://marketingeda.com/event/semi-therm/
LOCATION:DoubleTree Hotel\, 2050 Gateway Place\, San Jose\, CA\, 95110\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/SEMI-THERM-2023.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20221129T080000
DTEND;TZID=America/Los_Angeles:20221129T120000
DTSTAMP:20221011T180112Z
CREATED:20221011T180041Z
LAST-MODIFIED:20221011T180112Z
UID:5291-1669708800-1669723200@marketingeda.com
SUMMARY:Memory Technology Symposium
DESCRIPTION:Advancements in memory technology are fueling rapid growth in big data applications across AI\, 5G\, Automotive\, and HPC. These demanding applications create many challenges for memory designers. Some long-standing challenges are exacerbated\, while the latest technology nodes have introduced some new ones. At Synopsys\, there is a corporate-wide commitment to developing broad-based solutions that address these challenges. \nWhy attend?\nThe Synopsys Memory Technology Symposium\, a first-of-its-kind virtual event dedicated to memory design and development\, aims to provide a forum for leading Memory\, IP\, SoC Companies and Synopsys experts to share their perspectives on the industry’s most compelling and topical challenges across four themes: Design Technology Co-optimization (DTCO)\, Design Shift Left\, IP\, and Silicon Reliability. Register to learn more!​
URL:https://marketingeda.com/event/memory-technology-symposium/
CATEGORIES:EDA,IP,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/Screen-Shot-2022-10-11-at-10.57.56-AM.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Taipei:20221121T080000
DTEND;TZID=Asia/Taipei:20221123T170000
DTSTAMP:20221115T191652Z
CREATED:20221115T191639Z
LAST-MODIFIED:20221115T191652Z
UID:5403-1669017600-1669222800@marketingeda.com
SUMMARY:Asian Test Symposium 2022
DESCRIPTION:The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world to exchange innovative ideas on system\, board\, and device testing with design\, manufacturing\, and field consideration in mind.
URL:https://marketingeda.com/event/asian-test-symposium-2022/
LOCATION:Evergreen Laurel Hotel\, Evergreen Laurel Hotel (Taichung)No. 666\, Sec. 2 Taiwan Boulevard\, Taichung\, Taiwan
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/ATS-2022.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20221027T083000
DTEND;TZID=Europe/London:20221027T173000
DTSTAMP:20221007T183857Z
CREATED:20221007T183857Z
LAST-MODIFIED:20221007T183857Z
UID:5272-1666859400-1666891800@marketingeda.com
SUMMARY:Synopsys Technology Symposium 2022 - UK
DESCRIPTION:Synopsys Northern Europe is hosting a Technical Symposium providing updates on all aspects of doing state of the art designs at emerging and established nodes. \nThis event provides an opportunity for users to stay connected with the latest products and innovations as well as getting tips & tricks and best practices that our experts will share. \nSynopsys technical experts will provide an “under the hood” look at proven and new technologies that designers can use to accelerate their aggressive time schedules and to achieve challenging Performance\, Power and Area goals. \nMultiple tracks will be offered where experts will update you on exciting new technologies and features that are now available. \nWe will conclude the day with a social event where you will have the opportunity to meet and discuss with your industry peers and Synopsys experts in an informal atmosphere. \n  \nYou will also have the opportunity to win one of our prizes in our Prize draw at the end of the day.
URL:https://marketingeda.com/event/synopsys-technology-symposium-2022-uk/
LOCATION:Hilton Reading\, Drake Way\, Reading\, RG2 0GQ\, United Kingdom
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/Synopsys-October-27-2022.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20221019T080000
DTEND;TZID=America/Los_Angeles:20221019T113000
DTSTAMP:20221005T171014Z
CREATED:20221005T171014Z
LAST-MODIFIED:20221005T171014Z
UID:5262-1666166400-1666179000@marketingeda.com
SUMMARY:Synopsys Photonic Symposium
DESCRIPTION:Photonics and photonic IC technologies are crucial to support rapidly evolving internet\, healthcare\, mobility\, and security needs. Driven by data communications\, photonic ICs are moving rapidly from the laboratory to mainstream and fueling a wave of innovations and product introductions. \nJoin our virtual Photonic Symposium to hear about the latest developments\, application requirements\, best practices\, and future outlook. \nOur lineup of speakers includes industry leaders from: \n\nGlobalFoundries\nIntel\nOptica\nPOET Technologies\nSouthern Methodist University\, Department of Electrical and Computer Engineering\nSynopsys\nYole Group\n\nWho Should Attend?\nAttendees will learn about photonic IC technology advances and market trends\, as well as photonic applications in LiDAR\, quantum computing\, and co-packaged optics.
URL:https://marketingeda.com/event/synopsys-photonic-symposium-2/
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/Synopsys-October-19-2022.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20221006T080000
DTEND;TZID=America/Los_Angeles:20221007T170000
DTSTAMP:20220920T032644Z
CREATED:20220920T032644Z
LAST-MODIFIED:20220920T032644Z
UID:5217-1665043200-1665162000@marketingeda.com
SUMMARY:2022 IEEE Electronic Design Process Symposium (EDPS)
DESCRIPTION:We are planning to hold 2022 IEEE EDPS live! Looking forward to meeting with you face-to-face. \n\n\nAbout this event\n\n\n\n2022 IEEE EDPS will be held on Oct 6 and Oct 7 2022 in Milpitas\, CA. \nWe have invited industry practitioners and leaders from academia to present their work in following areas: \n\nInnovative Designs and Design Techniques including Design Co-optimization\nDesign for Trust/Design for Security\nAdvanced Packaging\, 3DIC\nDesign Technology Co-optimization/Systems Technology Co-optimization\nMachine Learning/Artificial Intelligence in System Design and EDA\nSystem Reliability\n5G Infrastructure\nSilicon Photonics\nSmart Manufacturing\n\nCheck out 2022 IEEE EDPS website for additional program details. \nPlease join us at SEMI facility in Milpitas\, CA this fall! The registration includes refreshments\, breakfast\, and lunch on both days\, as well as dinner on Thursday!
URL:https://marketingeda.com/event/2022-ieee-electronic-design-process-symposium-edps/
LOCATION:SEMI\, 673 S. Milpitas Blvd\, Milpitas\, CA\, United States
CATEGORIES:EDA,IP,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/EDPS-2022.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20220929T083000
DTEND;TZID=America/Los_Angeles:20220929T170000
DTSTAMP:20220810T163128Z
CREATED:20220810T163042Z
LAST-MODIFIED:20220810T163128Z
UID:5043-1664440200-1664470800@marketingeda.com
SUMMARY:Silicon Realization TechSummit
DESCRIPTION:This year’s event brings together Synopsys’ Digital Design Technical Symposium and Verification Day into a single event – Synopsys Silicon Realization TechSummit. This one-day\, in-person event is designed to inform executives\, managers\, and design and verification engineers about how the EDA industry is evolving.\n\nWhat Attendees Can Expect​\n\nA keynote and presentations from leaders in the EDA community.\nEngaging sessions focused on key technologies that make it possible for SoC designers to accelerate coverage closure and deliver energy-efficient chips with optimal power-performance-area faster than ever before.\nPanel discussions and a networking event where you can mingle with technologists and ask them you’re own challenging questions about the future of EDA.\n\nWe hope you’ll join us to learn about the challenges facing chip designers and the innovative digital design and verification solutions helping to solve them. Be sure to save the date!
URL:https://marketingeda.com/event/silicon-realization-techsummit/
LOCATION:Santa Clara Marriott\, 2700 Mission College Blvd\, Santa Clara\, CA\, 95054\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/Synopsys-September-29-2022.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Shanghai:20220630T080000
DTEND;TZID=Asia/Shanghai:20220630T170000
DTSTAMP:20220519T155249Z
CREATED:20220519T155249Z
LAST-MODIFIED:20220519T155249Z
UID:4746-1656576000-1656608400@marketingeda.com
SUMMARY:TSMC 2022 Technology Symposium - China\, Virtual
DESCRIPTION:Date\nJune 30\, 2022 (Thursday)\nTime\nStarts at 9:00 a.m.\n\nWebsite link to be announced in June \nGet the latest on:\n\nTSMC’s smartphone\, HPC\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric® advanced packaging technology advancement on InFO\, CoWoS®\, and SoIC\nTSMC’s manufacturing excellence\, capacity expansion plan\, and green manufacturing achievement\nTSMC’s Open Innovation Platform Ecosystem to speed up time-to-design\n\nFor more information on the TSMC Technology Symposium\, e-mail us at: symposium@tsmc.com. \nWe look forward to seeing you at the 2022 TSMC Technology Symposium!
URL:https://marketingeda.com/event/tsmc-2022-technology-symposium-china-virtual/
CATEGORIES:EDA,Foundry,IP,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/TSMC-2022.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Jerusalem:20220628T080000
DTEND;TZID=Asia/Jerusalem:20220628T170000
DTSTAMP:20220519T155026Z
CREATED:20220519T155026Z
LAST-MODIFIED:20220519T155026Z
UID:4743-1656403200-1656435600@marketingeda.com
SUMMARY:TSMC 2022 Technology Symposium - Israel
DESCRIPTION:Israel Technology Workshop (In-Person Event)\n\nDate\nJune 28\, 2022 (Tuesday)\nTime\n9:30a.m. – 4:30p.m.\nVenue\nDaniel Herzliya Hotel\nRamat Yam St 60\, Herzliya\, Israel\n\nEurope Technology Symposium (Online VOD Event)\n\nDate\nJune 30\, 2022 (Thursday)\n\nWebsite link to be announced in June \nGet the latest on:\n\nTSMC’s smartphone\, HPC\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric® advanced packaging technology advancement on InFO\, CoWoS®\, and SoIC\nTSMC’s manufacturing excellence\, capacity expansion plan\, and green manufacturing achievement\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design\n\nFor more information on the TSMC Technology Symposium\, e-mail us at symposium@tsmc.com. \nWe look forward to seeing you at the 2022 TSMC Technology Symposium!
URL:https://marketingeda.com/event/tsmc-2022-technology-symposium-israel/
LOCATION:Daniel Herzliya Hotel\, Ramat Yam St 60\, Herzliya\, Israel
CATEGORIES:EDA,Foundry,IP,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/TSMC-2022.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Amsterdam:20220620T080000
DTEND;TZID=Europe/Amsterdam:20220620T170000
DTSTAMP:20220519T154700Z
CREATED:20220519T154638Z
LAST-MODIFIED:20220519T154700Z
UID:4739-1655712000-1655744400@marketingeda.com
SUMMARY:TSMC 2022 Technology Symposium - Europe
DESCRIPTION:Europe Technology Symposium (In-Person Event)\n\nDate\nJune 20\, 2022 (Monday)\nTime\n8:30a.m. – 4:50p.m.\nVenue\nHilton Amsterdam Airport Schiphol\nSchiphol Boulevard 701Amsterdam\,1118BN Netherlands\n\nIsrael Technology Workshop (In-Person Event)\n\nDate\nJune 28\, 2022 (Tuesday)\nTime\n9:30a.m. – 4:30p.m.\nVenue\nDaniel Herzliya Hotel\nRamat Yam St 60\, Herzliya\, Israel\n\nEurope Technology Symposium (Online VOD Event)\n\nDate\nJune 30\, 2022 (Thursday)\n\nWebsite link to be announced in June \nGet the latest on:\n\nTSMC’s smartphone\, HPC\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric® advanced packaging technology advancement on InFO\, CoWoS®\, and SoIC\nTSMC’s manufacturing excellence\, capacity expansion plan\, and green manufacturing achievement\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design\n\nFor more information on the TSMC Technology Symposium\, e-mail us at symposium@tsmc.com. \nWe look forward to seeing you at the 2022 TSMC Technology Symposium!
URL:https://marketingeda.com/event/tsmc-2022-technology-symposium-europe/
LOCATION:Hilton Amsterdam Airport Schiphol\, Schiphol Boulevard 701 Amsterdam\, Amsterdam\, Netherlands
CATEGORIES:EDA,Foundry,IP,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/TSMC-2022.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Denver:20220619T080000
DTEND;TZID=America/Denver:20220624T170000
DTSTAMP:20220613T163556Z
CREATED:20220613T163556Z
LAST-MODIFIED:20220613T163556Z
UID:4830-1655625600-1656090000@marketingeda.com
SUMMARY:International Microwave Symposium
DESCRIPTION:IMS is the flagship event in a week dedicated to all things microwaves and RF. The week also includes the IEEE MTT-S Radio Frequency Integrated Circuits Symposium (RFIC) and the Automatic Radio Frequency Techniques Group (ARFTG).
URL:https://marketingeda.com/event/international-microwave-symposium/
LOCATION:Denver Convention Center\, 700 14th Street\, Denver\, CO\, 80202\, United States
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/IMS-2022.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20220616T080000
DTEND;TZID=America/Los_Angeles:20220616T170000
DTSTAMP:20220519T154250Z
CREATED:20220519T154250Z
LAST-MODIFIED:20220519T154250Z
UID:4736-1655366400-1655398800@marketingeda.com
SUMMARY:TSMC 2022 Technology Symposium - North America
DESCRIPTION:A Technology Symposium (In-Person Event)\nDate:\nJune 16\, 2022 (Thursday)\nTime:\n8:30a.m. – 5:05p.m.\nVenue:\nSanta Clara Convention Center\n5001 Great America Parkway\,\nSanta Clara\, CA 95054\n\n\nNA Technology Symposium (Online VOD Event)\nDate:\nJune 30\, 2022 (Thursday)\n\nWebsite link to be announced in June \nGet the latest on:\n\nTSMC’s smartphone\, HPC\, IoT\, and automotive platform solutions\nTSMC’s advanced technology progress on 5nm\, 4nm\, 3nm processes and beyond\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC 3DFabric™ advanced packaging technology advancement on InFO\, CoWoS®\, and SoIC\nTSMC’s manufacturing excellence\, capacity expansion plan\, and green manufacturing achievement\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design\n\nFor more information on the TSMC Technology Symposium\, e-mail us at symposium@tsmc.com. \nWe look forward to seeing you at the 2022 TSMC Technology Symposium!
URL:https://marketingeda.com/event/tsmc-2022-technology-symposium-north-america/
LOCATION:Santa Clara Convention Center\, 5001 Great America Parkway\, Santa Clara\, CA\, 95054\, United States
CATEGORIES:EDA,Foundry,IP,Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/TSMC-2022.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20220523T080000
DTEND;TZID=America/Los_Angeles:20220527T170000
DTSTAMP:20220511T180803Z
CREATED:20220511T180803Z
LAST-MODIFIED:20220511T180803Z
UID:4690-1653292800-1653670800@marketingeda.com
SUMMARY:European Test Symposium 2022
DESCRIPTION:The IEEE European Test Symposium (ETS) is Europe’s premier forum dedicated to presenting and discussing scientific results\, emerging ideas\, applications\, hot topics and new trends in the area of electronic-based circuits and system testing\, reliability\, security and validation. ETS’22 will be held in Casa Convalescència\, located in the historical modernist site Hospital de la Santa Creu i Sant Pau (World Heritage Site by UNESCO\, 1997) in Barcelona\, which is located 10 minutes walking from the Sagrada Familia. The format of the conference will be hybrid\, please check “COVID19” menu for more details. ETS’22 is organized by UPC (Universitat Politècnica de Catalunya).\nThe program includes keynotes\, scientific paper presentations\, panels\, tutorials\, workshops and highlights/demos from industry. Besides regular technical papers\, ETS’22 provides the opportunity of submitting scientific contributions for hot-topic papers and case-study papers (each with specific evaluation criteria). Submissions are also solicited for special sessions\, tutorials\, panels and workshops\, as well as for the PhD Forum. Linked to the main ETS’22 symposium\, the Test Spring School and Fringe Workshops will be organized.
URL:https://marketingeda.com/event/european-test-symposium-2022/
LOCATION:Casa Convalescencia\, Barcelona\, Spain
CATEGORIES:EDA,Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/European-Test-Symposium-2022.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20220425T080000
DTEND;TZID=America/Los_Angeles:20220427T170000
DTSTAMP:20220412T212929Z
CREATED:20220412T212929Z
LAST-MODIFIED:20220412T212929Z
UID:4544-1650873600-1651078800@marketingeda.com
SUMMARY:40th IEEE VLSI Test Symposium 2022
DESCRIPTION:The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in the test\, validation\, yield\, reliability\, and security of microelectronic circuits and systems. \nDue to the COVID-19 worldwide situation\, the 2022 edition of VTS will be a fully virtual interactive live event. \nUpdate: We offer an option for attendees to attend the first day of the symposium (April 25) in-person at Synopsys site in Northern California (details to come soon) \nThe symposium will take place on April 25-27\, 2022. \nThe program includes keynotes\, scientific paper presentations\, short industrial application paper presentations\, special sessions\, and Innovative Practices sessions. \nNews for authors: VTS review process is DOUBLE BLIND with REBUTTAL\, for both scientific papers and industrial application short papers. The references do not count towards the page limit.
URL:https://marketingeda.com/event/40th-ieee-vlsi-test-symposium-2022/
CATEGORIES:Symposium
ATTACH;FMTTYPE=image/png:https://marketingeda.com/wp-content/uploads/VTS-2022.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20211019T080000
DTEND;TZID=America/Los_Angeles:20211021T170000
DTSTAMP:20211013T030000Z
CREATED:20211013T030000Z
LAST-MODIFIED:20211013T030000Z
UID:3509-1634630400-1634835600@marketingeda.com
SUMMARY:ERI Summit & MTO Symposium
DESCRIPTION:What is the ERI Summit & MTO Symposium?\n\n\n\n\n\n\n\n\n\n\n\nThe DARPA Microsystems Technology Office (MTO) Electronics Resurgence Initiative (ERI) is a response to several technical and economic trends in the microelectronics sector. Among these trends\, the rapid increase in the cost and complexity of advanced microelectronics design and manufacture is challenging a half-century of progress under Moore’s Law\, prompting a need for alternative approaches to traditional transistor scaling. The DARPA ERI Summit is a virtual event to investigate innovative solutions that address these challenging trends. \n\n\n\n\n\n\n\n\n\n\nWho Should Attend?\n\n\n\n\n\n\n\n\n\n\n\nThis event provides an opportunity for government researchers\, defense prime contractors\, smaller defense suppliers\, national laboratories\, industry leaders and academia to mix and see presentations on the latest technologies and products. This is a must-attend event for engineers\, scientists and managers who are interested in innovation\, security\, resilience\, safety\, and reliability.  Learn more about how Synopsys supports Aerospace & Defense here:
URL:https://marketingeda.com/event/eri-summit-mto-symposium/
CATEGORIES:Symposium
ATTACH;FMTTYPE=image/jpeg:https://marketingeda.com/wp-content/uploads/DARPA-ERI.jpg
END:VEVENT
END:VCALENDAR