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Using OSVVM’s AXI4 Verification Components
Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 2 of this presentation focuses on how to write tests and configure the AXI4 VCs. AXI4 VCs are probably the most complex VCs in the OSVVM library. This complexity is due to the… Using OSVVM’s AXI4 Verification Components
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MLCAD Symposium 2024
Snowbird 9385 Snowbird Center Trail, Sandy, UT, United StatesThe symposium focuses on Machine Learning (ML) for all aspects of CAD and electronic system design. The symposium is sponsored by both the ACM Special Interest Group on Design Automation (SIGDA) and the IEEE Council on Electronic Design Automation (CEDA). The symposium program will have keynote and invited speakers in addition to technical presentations. MLCAD… MLCAD Symposium 2024
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AI Hardware & Edge AI Summit 2024
Signia by Hilton 170 S Market Street, San Jose, CA, United StatesThe AI Hardware & Edge AI Summit is the ultimate destination for the entire AI and ML ecosystem, with a collaborative mission to train, deploy and scale machine learning systems that are fast, affordable, and efficient. Whether it’s forging new partnerships, staying ahead of the ever-changing semi-conductor landscape, learning how to build, train, and deploy efficient systems,… AI Hardware & Edge AI Summit 2024
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IP-SoC South Korea 24
EL Tower 6F 213 Gangnamdaero, Seoul, Korea, Republic ofA worldwide connected Event !! D&R IP-SoC South Korea 2024 Day is the unique worldwide Spring event fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems. IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services and share their vision about the next innovation… IP-SoC South Korea 24
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Can AI make cameras see in the dark?
Abstract As cameras become ubiquitous in applications such as surveillance, mobile, drones, and automotive systems, achieving clear vision 24/7 under any condition—including extreme low light and high dynamic range scenarios—has become essential. By leveraging Edge AI processors, a software ISP based on neural network technology can process and optimize video in real-time, surpassing human… Can AI make cameras see in the dark?
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Faster Design TAT and Upscaled Team Productivity with Cadence’s True Hybrid Cloud
Join us for an informative webinar as we unveil the new hybrid cloud capabilities of our cloud solutions designed to revolutionize EDA workloads. Whether you need peak capacity for a short duration or want a front-to-back turnkey cloud environment, our cloud solutions offer unparalleled flexibility and efficiency. We will discuss how Cadence True Hybrid Cloud… Faster Design TAT and Upscaled Team Productivity with Cadence’s True Hybrid Cloud
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Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs
Delve into how Questa Formal Verification IP (VIP) for the AMBA protocol ensures that designs incorporating AMBA adhere strictly to the protocol; all without the need for simulation. The solution integrates comprehensive protocol knowledge and provides user-friendly interfaces, significantly reducing the setup time for verification environments. Optimized for top-tier performance and scalability, Questa Formal VIP… Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs
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Verification Futures Conference 2024 Austin
Austin Marriott South 4415 South Interstate 35 Frontage Road, Austin, TX, United StatesThe Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for end-users to define their current and future verification challenges and collaborate with the vendors to create solutions. It also provides… Verification Futures Conference 2024 Austin
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D&R IP-SoC China 2024 Day
Evergreen Laurel Hotel Evergreen Laurel Hotel (Taichung)No. 666, Sec. 2 Taiwan Boulevard, Taichung, TaiwanD&R IP-SoC China 2024 Day is the unique worldwide event in China fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems. IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services and share their vision about the next innovation steps in the Electronic Industry.… D&R IP-SoC China 2024 Day
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Addressing 3D-IC Power Integrity Design Challenges
Power network design and analysis of 3D-ICs is a major challenge because of the complex nature and large size of the power network. In addition, designers must deal with the complexity of routing power through the interposer, multiple dies, through-silicon vias (TSVs), and through-dielectric vias (TDVs). In this webinar, you will learn how the Cadence… Addressing 3D-IC Power Integrity Design Challenges
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Leveraging Verisium Debug to Debug Digital-Mixed Signal Designs
Many of today’s designs that are primarily digital also contain analog components. We refer to such designs as “Digital-Mixed-Signal” or DMS designs. In this webinar, we will demonstrate using the Verisium Debug App to debug such DMS designs. What You Will Learn How Verisium Debug supports debugging Xcelium (Real Number Modeling) RNM and mixed Xcelium… Leveraging Verisium Debug to Debug Digital-Mixed Signal Designs
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Unleash Performance, Save Power: Mastering Processor Customization with the Tensilica Instruction Extension (TIE) Language
Join us for an engaging webinar where we show you how to turbocharge performance and minimize power consumption by harnessing the power of custom instructions using the TIE language. Don't miss this opportunity to optimize your processors like never before! TIE enables you to compute and move data many times faster than conventional processors, resulting… Unleash Performance, Save Power: Mastering Processor Customization with the Tensilica Instruction Extension (TIE) Language
12 events found.