Synopsys Processor IP Summit 2024: RISC-V, DSP and NPU IP for Your Diverse SoC Processing Needs
Santa Clara Marriott 2700 Mission College Blvd, Santa ClaraAs electronic systems continue to become more complex and integrate greater functionality, SoC developers are faced with the challenge of developing more powerful, yet more energy-efficient devices. The processors used… Synopsys Processor IP Summit 2024: RISC-V, DSP and NPU IP for Your Diverse SoC Processing Needs
Enhanced Packaging Performance and Manufacturing with Physics-Based 3D Simulation
About this webinar Digital engineering is ramping up across the CPG, healthcare and wider packaging sector. Packaging engineers are tasked with producing fit-for-purpose packaging that is optimised for customer-use, transportation,… Enhanced Packaging Performance and Manufacturing with Physics-Based 3D Simulation
Using OSVVM’s AXI4 Verification Components
Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 2 of this presentation focuses on how to… Using OSVVM’s AXI4 Verification Components