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Faster IC Designs Without Using a Clock and With Delay Insensitive Results

Digital designers are taught on day one that they must use synchronous logic design which employ a clock to synchronize all events in their IC design, and so it has been for decades. Unless of… Faster IC Designs Without Using a Clock and With Delay Insensitive Results

Thermal Analysis for IC Designs

Ed Cheng, CEO at Gradient Design Automation recently spoke with me about his unique company focused on thermal analysis of IC designs. I first met Ed at Silicon Compilers in 1986, plus we both worked… Thermal Analysis for IC Designs

Mentor Graphics

EDA without using the Acronym EDA

Two press releases came out today and they were both from major EDA companies that are now starting to position themselves without using the EDA acronym. Perhaps this is a new but subtle trend to… EDA without using the Acronym EDA

Semiconductor IP Booms in Q2 2010

EDAC publishes a quarterly report called the Market Statistics Service and I just read that Semiconductor IP sales jumped 35.3% in Q2 2010 compared to Q2 2009. The Americas region is still the largest sales… Semiconductor IP Booms in Q2 2010

Ciranova Receives Intel Funding

At the 2009 DAC I was visiting Ciranova at their booth when an Intel guy walked up and started talking excitedly with an executive about using Ciranova tools, at which point the executive asked me… Ciranova Receives Intel Funding

Tanner EDA Tools Now on Linux

Linux is a mainstream OS used by IC designers worldwide so Tanner EDA has good timing in offering a full-flow Analog IC Design Suite on Linux.  Tanner tools started out on Microsoft Windows and now… Tanner EDA Tools Now on Linux