Austin Texas was a fantastic location for DAC this year, and I even brought my wife along so that she could see the sites while I was busy visiting 27 EDA, IP and Semi companies.
Enjoy reading the trip reports, and if you have any questions then please give me a phone call or email to discuss how I may help you market better in the EDA industry.
DAC Trip Reports
- ARM SoC Hardening
- AMS IC Simulation update From Synopsys at DAC
- ARM Update at DAC
- Custom Physical IC Design update from Cadence at DAC
- GPU-Based SPICE Simulator for IC Library Characterization
- Tela Innovations, DAC Update
- Calibre Update at DAC
- Eldo and Pyxis from Mentor, DAC Update
- Deploying 14nm FinFETs in your Next Mobile SoC
- Physical IP Update at DAC
- A New STA Tool at DAC, No Not Cadence
- IC Variability Analysis at DAC
- Fujitsu, Mediatek, Richtek and Synopsys talk about Custom IC Design at DAC
- Full Visibility in ASIC Prototypes at DAC
- Visual AMS Debug, an update at DAC
- Circuit Simulation update from Cadence at DAC
- SPICE update from ProPlus at DAC
- An EDA update from Dassault Systemes at DAC
- A 3D Field Solver at DAC for Parasitic Extraction, Thermal and ESD Analysis
- Verifying Standard Cell Libraries at DAC
- EDA Tools from China at DAC
- HW Prototyping and HLS at DAC
- Analog FastSPICE at DAC
- Analysis of Power, Thermal, EM, IR at DAC
- Speeding Design Closure at DAC
- Design, Test and Regression Management of SoCs at DAC
- SoC Constraints, Design & Verification at DAC
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