I’ve followed the enthusiastic market acceptance of FPGA chips over the decades, and even semiconductor companies like Intel acquired Altera, while AMD tries to acquire Xilinx. The idea of field programmable logic makes a lot of sense for use in systems designs today, and it was inevitable that a company like Menta would offer both soft and hard IP for embedding an FPGA into an ASIC design. At the #58thDAC I met with Yoan Dupret, the Managing Director & CTO at Menta, who has also done stints at Altis Semiconductor, Infineon Technologies, CSR, Samsung and DelfMEMS.
Walking the exhibit floors at DAC in December I spotted the familiar face of Anupam Bakshi, Founder and CEO of Agnisys, so I stopped by the booth to get an update on his EDA company. My first question for him was about the origin of the company name, Agnisys, and I found at that Agni means Fire in Sanskrit, one of the five elements.
It’s been awhile since I really looked at what Cliosoft has to offer in the EDA tool space, so at the 58th DAC I stopped by their exhibit booth on Tuesday to visit with Karim Khalfan, VP of Application Engineering, and Simon Rance, VP of Marketing. Their booth had all of the hot market segments listed: Automotive, 5G, IoT, AI, Foundries.…
Tuesday at DAC was actually my very first time attending a technical session, and the presentation from Nebabie Kebebew, Siemens EDA, was called, Mitigating Variability Challenges of IPs for Robust Designs. There were three presentations scheduled for that particular Designer, IP and Embedded Systems track, but with the COVID…
My third event at DAC on Monday was all about using EDA tools in the Cloud, and so I listened to Craig Johnson, VP EDA Cloud Solutions, Siemens EDA. Early in the day I heard from Joe Sawicki, Siemens EDA, on the topic of Digitalization.
Functional safety has been at the forefront of the electrification of our vehicles with new ADAS features, and the push to reach autonomous driving, while having compliance with the ISO 26262 functional safety standard. I attended the Accellera hosted panel discussion on Monday at DAC, hearing from functional safety panelists that work at AMD, Arm, Texas Instruments, and DARPA. Alessandra Nardi, Accellera Functional Safety Working Group Chair moderated the panel discussion, and started out with a big picture overview first.
Monday at DAC this year started off on a very optimistic note as Joe Sawicki from Siemens EDA presented in the Pavilion on the topic of Digitalization, a frequent theme in the popular press because of the whole Work From Home transition that we’ve gone through during the pandemic. Several industries are benefiting from the digitalization trend: semiconductor, aerospace, defense, automotive, heavy machinery, medical, consumer products, energy, utilities and even marine.
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Marketing consultant for hire on EDA projects https://t.co/XI77571ukZ. Blogger https://t.co/WAyjkr2utZ. Christian, father, husband, classic music, road cyclist.
At the #58thDAC I talked with Menta to understand more about their embedded FPGA #SemiIP. Blog is at #SemiWiki
DAC 2021 – Embedded FPGA IP from Menta - Semiwiki
I've followed the enthusiastic market acceptance of FPGA chips over…
I got an update at the #58thDAC from Agnisys and their spec-driven IC development approach. #SemiEDA #SemiIP #SemiWiki
DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development - Semiwiki
Walking the exhibit floors at DAC in December I spotted…
At the #58thDAC I caught up with my contacts at Cliosoft to hear what they've been offering to IC designers in design and data management, it's impressive. #SemiEDA #SemiIP #SemiWiki
DAC 2021 – Cliosoft Overview - Semiwiki
It's been awhile since I really looked at what Cliosoft…
Nebabie Kebebew of Siemens EDA presented at the #58thDAC about taming process variability, read the blog for more info. #SemiEDA #SemiIP #SemiWiki
DAC 2021 – Taming Process Variability in Semiconductor IP - Semiwiki
Tuesday at DAC was actually my very first time attending…
At the #58thDAC I learned what Siemens EDA has to offer for #SemiEDA tools in the cloud, and it's a lot. #SemiWiki
DAC 2021 – Siemens EDA talks about using the Cloud - Semiwiki
My third event at DAC on Monday was all about…
Just added @scianalog to my annual gallery of holiday greetings, they also exhibited at the #58thDAC in SFO earlier this month. #SemiEDA #SemiIP
Merry Christmas 2021 - Marketing EDA
It’s time for my annual Christmas and Holiday greetings from #SemiEDA and #SemiIP companies. Send me your favo...
#58thDAC had an email glitch today, and resent my 2021 registration confirmation, after the event ended. Uh oh.
My #58thDAC trip report is expanding, now that I have time to write up what I learned last week in SFO, more to come, stay tuned. Blogs from #SemiWiki, tweets and photos. https://marketingeda.com/dac-trip-reports/dac-2021/ #SemiEDA #SemiIP
Thank you #58thDAC sponsors at Moscone West.
Ramy is with Intento Design at the #58thDAC talking about ID-Xplore-SyS, a tool used by IDM and foundries doing fast migration of analog circuits. #SemiEDA Ramy has attended DAC since 2016.
Mirabilis is at the #58thDAC showing how to visualize the timing and power of high performance SoC systems. Ask for Deepak at booth #2441. #SemiEDA
Empyrean is at #58thDAC this week, and they have a GPU-powered SPICE circuit simulator, and a parallel SPICE tool too. #SemiEDA
How about embedding an FPGA in your next SoC? Come and see Menta at the #58thDAC. Ask for Yoan Dupret. #SemiIP
Ask for Mehmet to find out about IC library characterization tools, #58thDAC. #SemiEDA We worked together at Silicon Compilers back in the 1980s.
MunEDA is at #58thDAC, so come and see their circuit porting & migration tools, circuit sizing & optimization tools, circuit analysis, and high sigma. #SemiEDA
More details about LUBIS EDA, and how they automatically generate Verification IP, uh huh, . First time at the #58thDAC. #SemiEDA
Improving HLS flows with a smart hardware generation
Novel solution to generate a synthesizable hardware design from an abstract software model. Our goal is to enhance ...
More details on JuliaSPICE from Cedar EDA, a 1st time exhibitor at the #58thDAC, here’s their 26 minute video. It’s about the same speed as Xyce, but not sure how that compares to commercial SPICE simulators yet. Stay tuned. #SemiEDA https://youtu.be/q8SzFTtgA60
ProteanTecs is a first time #58thDAC attendee, and their IP is embedded into your SoC for performance monitoring, even after silicon comes out. I’ll attend a Pavillion presentation with them next. #SemiIP Booth 1554 at Moscone West.
Dermott Lynch at Silicon Frontline knows all about EM/IR, and ESD for SoCs. Attending DAC since 1987, wow, enjoy your visit at #58thDAC. #SemiEDA
SoC Compiler announced in May 2021 by Defacto, come check it out in booth #1363 and ask for Bastien. #58thDAC Nice front end for SoC creation, uses RTL and design collaterals like UPF, IP-XACT, SDC, etc. #SemiEDA
LUBIS EDA creates properties from SystemC that can be prove equivalence with your RTL, cool idea, first time at #58thDAC, based in German, ask for Dr. Michael Schwarz. #SemiEDA
First time at #58thDAC is Cedar EDA, offering a new analog simulator based on the Julia language. Interesting if you want to do some optimization. #SemiEDA
Ajay Daga and John Hatfield at #58thDAC with FishTail, they help with timing constraints for SDC flows. Their customer list has doubled in the past 18 months, wow. Facebook is a happy customer. #SemiEDA
Bob Slee with EDA Direct is at #58thDAC, helping at ClioSoft, we often read each other's tweets about #SemiEDA and #SemiIP.