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GTS 2023 – Munich

Sofitel Munich Bayerpost Bayerstrasse 12, Munich, Germany

Register now and join us at GlobalFoundries Technology Summit 2023! GF Technology Summit (GTS) 2023 is our worldwide, annual series of technology-focused events. GTS brings together leaders from the commercial, business and research worlds to understand the latest technology challenges and opportunities, and partner to create the most innovative applications and solutions. GTS 2023 Highlights This year's… Read More »GTS 2023 – Munich

TSMC 2023 Europe OIP Ecosystem Forum

Hilton Amsterdam Airport Schiphol Schiphol Boulevard 701 Amsterdam, Amsterdam, Netherlands

Learn About: Emerging advanced node design challenges and corresponding design flows and methodologies for N2, N3/N3E/N3P/N3AE, N4/N4P, N5/N5A, N6/N6e/N6RF/N7, N12e, and N22 Latest updates on TSMC 3DFabric™ chip stacking and advanced packaging processes, InFO, CoWoS®, and SoIC, 3DFabric Alliance, and 3Dblox™ standard, plus innovative 3Dblox-based design enablement technologies and solutions, targeting HPC, AI/ML, and mobile… Read More »TSMC 2023 Europe OIP Ecosystem Forum

Verisium Debug for UVM Testbench

Verisium Debug offers comprehensive debugging capabilities. From RTL and UVM testbench to UPF low-power designs, Cadence’s unified debugging platform helps users debug. In this webinar, users will learn about the available features in Verisium Debug for UVM testbench and use these unique capabilities to visualize and debug the UVM testbench. What you will learn Understand… Read More »Verisium Debug for UVM Testbench

EDPS 2023

Synopsys Building 1 800 North Mary Avenue, Sunnyvale, CA, United States

EDPS 2023 is approaching fast! The program is firming up - please see the program page for a preliminary list of talks. REGISTRATION IS NOW OPEN. Everyone, including speakers, must register. Note that this year we'll be meeting on the Synopsys Campus. Synopsys Building 1 800 North Mary Avenue Sunnyvale, CA, 94085   Most of the talks… Read More »EDPS 2023

FPGA Design Verification – Advanced Methods

Abstract As FPGA technology continues to evolve - to provide us with full-blown SoCs with CPU, GPU, and high-speed peripherals, for example, joining the traditional programmable logic area - design verification becomes increasingly challenging. Lab-based FPGA testing and bring-up alone are clearly insufficient, especially for safety-critical designs, and FPGA teams are adopting advanced design verification… Read More »FPGA Design Verification – Advanced Methods

International Test Conference 2023

Disneyland Hotel 1150 West Magic Way, Anaheim, CA, United States

International Test Conference, the cornerstone of TestWeek™ events, is the world’s premier conference dedicated to the electronic test of devices, boards and systems-covering the complete cycle from design verification, test, diagnosis, failure analysis and back to process and design improvement. At ITC, test and design professionals can confront the challenges the industry faces, and learn how… Read More »International Test Conference 2023

Synopsys Verification Technical Symposium 2023 – Israel

Daniel Herzliya Hotel Ramat Yam St 60, Herzliya, Israel

Join us for a day filled with insights, innovation, and networking in the semiconductor industry. The verification landscape is evolving, and we're here to help you navigate it. At this symposium, we’ll be going through some of the most challenging use cases in chip design today, while exploring best practices and the latest innovations for… Read More »Synopsys Verification Technical Symposium 2023 – Israel

Keysight EDA 2024

Shift Left to Raise Design Productivity We're ready to demo the latest release of our suite of electronic design automation (EDA) software tools so that you can learn how to increase productivity by shifting left your design process and product development cycles. Four Tracks to Choose from We'll kick off each session with an overview… Read More »Keysight EDA 2024

Synopsys Technology Symposium UK 2023

Reading FC Conference Centre Reading RG2 0FL, Berkshire, United Kingdom

Synopsys is hosting a Technical Symposium focusing on critical aspects of doing state of the art designs at established and emerging nodes. This event provides an opportunity for users to stay connected with the latest innovations as well as getting tips & tricks and best practices that fellow users and Synopsys experts will share. Multiple… Read More »Synopsys Technology Symposium UK 2023

Proactively Address Thermal Concerns in Advanced IC Packages

The heterogeneous integration of chips and chiplets in IC packages is all the rage as we face “More than Moore” performance challenges. While these innovative design practices successfully address performance goals, some design teams find that IC packages may overheat if they do not carefully plan for heat dissipation. This webinar will show how design… Read More »Proactively Address Thermal Concerns in Advanced IC Packages

The UCIe™ 1.1 Specification: Future Applications of Chiplets

Presenter: Dr. Debendra Das Sharma, UCIe Consortium Chairman and Intel Senior Fellow, Chief Architect of I/O Technology and Standards at Intel  The UCIe™ (Universal Chiplet Interconnect Express™) 1.1 Specification was released in August 2023, delivering valuable improvements to the chiplet ecosystem, extending reliability mechanisms to more protocols and supporting broader usage models. This webinar will provide… Read More »The UCIe™ 1.1 Specification: Future Applications of Chiplets

IEEE 32nd Asian Test Symposium

With the test technology facing its grand challenges to ensure the quality of ICs and electronic systems, incorporating more and more sophisticated manufacturing processes and system integration technologies in various emerging applications such as Internet of Things, cloud computing, automotive electronics, etc., global proliferation and cooperation is increasingly more important. The Asian Test Symposium (ATS)… Read More »IEEE 32nd Asian Test Symposium

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