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	  IRPS 2023Hyatt Regency Monterey 1 Old Golf Course Rd, Monterey, CA, United StatesFor 60 years, IRPS has been the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all other parts of the world… IRPS 2023 will be presented as an in-person conference, with a virtual component available. The… IRPS 2023 
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	  2023 US ESD WorkshopHyatt Regency Monterey 1 Old Golf Course Rd, Monterey, CA, United StatesWe are happy to announce that once again the International Electrostatic Discharge Workshop (IEW) will be co-locating with IRPS this year. Their submission deadline is January 23, 2023. For further details, including the Call for Posters, please visit their webpage here. 
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	  Maximizing yields through collaborationSemiconductor companies have long recognized the importance of yield management and having the right support in place to maximize results. In this 30-minute webinar brought to you by yieldHUB and SemiWiki, attendees will learn about a key to success in the world of yield management (and something that can be underestimated) - collaboration. This is… Maximizing yields through collaboration 
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	  ESD Alliance Export SeminarCadence Design Systems, Bldg 10 2655 Seeley Avenue, San Jose, CA, United StatesThe ESD Alliance Export Committee will hold a seminar called “The Impact of New Regulations on the Semiconductor Design Ecosystem.” This seminar is presented by the ESD Alliance, a SEMI Technology Community, and will be hosted by Cadence Design Systems at their San Jose Headquarters. The Cadence Government and Trade Team will cover general trade compliance… ESD Alliance Export Seminar 
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	  FPGA Frontrunner Meet & GreetLeonardo EH5 2XS, Edinburgh, United KingdomTechNES is pleased to announce the next FPGA Front Runners event – to he hosted by Leonardo at their venue in Edinburgh on March 29th, and will focus on FPGA Design using High Level Languages. The FPGA Front runners is all about bringing together the UK FPGA & ASIC design communities to discuss all things… FPGA Frontrunner Meet & Greet 
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	  SNUG Silicon Valley 2023Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesSince 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Software. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America, Europe, Asia, and Japan. In addition to peer-reviewed technical presentations and insightful keynotes from… SNUG Silicon Valley 2023 
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	  Siemens Tessent DFT Forum 2023 IndiaHotel Radisson Blu Marathalli ORR, Bengaluru, IndiaAbout Siemens Tessent DFT Forum 2023 India Presenting silicon lifecycle solutions from Siemens EDA: Engineering a smarter future faster Join us for the Siemens Tessent Design-for-Test (DFT) India Tech Forum, being held in Hotel Radisson Blu, Marathalli ORR, Bengalur India, on 29th March, 2023 learn from Industry leaders, fellow designers and experts from Siemens about how to leverage the Tessent… Siemens Tessent DFT Forum 2023 India 
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	  Versal Adaptive SoCs ONLINE WORKSHOPStandard Level - 2 sessions (4 hours per session including breaks) With thanks to AMD Xilinx for sponsoring this workshop: It is available to attend FREE OF CHARGE (Usual price $990) March 30-31 2023 - Americas - Register Now » March 30-31 2023 - EurAsia - Register Now » The Versal® Adaptive SoC from AMD Xilinx is multi-featured, offering… Versal Adaptive SoCs ONLINE WORKSHOP 
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	  How to Achieve Seamless Deployment of Level 3 Virtual ECUs for Automotive Digital TwinsDriven by the trend towards software-defined vehicles (SDV), more complex software stacks are now being integrated into innovative automotive E/E architectures. Today the early integration testing of automotive software is already supported by using virtual ECUs (vECUs). However, the production basic software (BSW) is often not included because the virtualization of the hardware-specific microcontroller abstraction layer (MCAL)… How to Achieve Seamless Deployment of Level 3 Virtual ECUs for Automotive Digital Twins 
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	  Latch-Up 2023University of California, Santa Barbara Santa Barbara, CA, United StatesThe FOSSi Foundation is proud to announce Latch-Up, a conference dedicated to free and open source silicon to be held over the weekend of Friday, March 31 to Sunday, April 2, 2023 in Santa Barbara, California, USA. Latch-Up is a weekend of presentations and networking for the open source digital design community, much like its European sister conference ORConf. So… Latch-Up 2023 
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	  Shorten Your CDC Debug Cycle by 10X with ML-based RCAOver the last few decades System on Chip (SoC) design size has dramatically increased, and more complexity has been introduced to deliver the desired functionality. Growing design sizes lead to the introduction of several asynchronous clocks which can result in the reporting of millions of clock domain crossings (CDC) at the IP/SoC level. This leads… Shorten Your CDC Debug Cycle by 10X with ML-based RCA 
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	  ISQED 2023Seven Hills Conference Center 800 Font Blvd, San Francisco, CA, United StatesThe 24th International Symposium on Quality Electronic Design (ISQED'23) is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology,packaging, assembly & test to achieve total design quality. ISQED 2023 will held with the technical sponsorship of IEEE CASS, IEEE EDS, and in-cooperation with ACM/SigDA. Conference… ISQED 2023 
	
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