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  • ESD Alliance Export Seminar

    Cadence Design Systems, Bldg 10 2655 Seeley Avenue, San Jose, CA, United States

    The ESD Alliance Export Committee will hold a seminar called “The Impact of New Regulations on the Semiconductor Design Ecosystem.” This seminar is presented by the ESD Alliance, a SEMI Technology Community, and will be hosted by Cadence Design Systems at their San Jose Headquarters. The Cadence Government and Trade Team will cover general trade compliance… ESD Alliance Export Seminar

  • FPGA Frontrunner Meet & Greet

    Leonardo EH5 2XS, Edinburgh, United Kingdom

    TechNES is pleased to announce the next FPGA Front Runners event – to he hosted by Leonardo at their venue in Edinburgh on March 29th, and will focus on FPGA Design using High Level Languages. The FPGA Front runners is all about bringing together the UK FPGA & ASIC design communities to discuss all things… FPGA Frontrunner Meet & Greet

  • SNUG Silicon Valley 2023

    Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United States

    Since 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Software. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America, Europe, Asia, and Japan. In addition to peer-reviewed technical presentations and insightful keynotes from… SNUG Silicon Valley 2023

  • Siemens Tessent DFT Forum 2023 India

    Hotel Radisson Blu Marathalli ORR, Bengaluru, India

    About Siemens Tessent DFT Forum 2023 India Presenting silicon lifecycle solutions from Siemens EDA:  Engineering a smarter future faster Join us for the Siemens Tessent Design-for-Test (DFT) India Tech Forum, being held in Hotel Radisson Blu, Marathalli ORR, Bengalur India, on 29th March, 2023 learn from Industry leaders, fellow designers and experts from Siemens about how to leverage the Tessent… Siemens Tessent DFT Forum 2023 India

  • Versal Adaptive SoCs ONLINE WORKSHOP

    Standard Level - 2 sessions (4 hours per session including breaks) With thanks to AMD Xilinx for sponsoring this workshop: It is available to attend FREE OF CHARGE (Usual price $990)  March 30-31 2023 - Americas - Register Now » March 30-31 2023 - EurAsia - Register Now » The Versal® Adaptive SoC from AMD Xilinx is multi-featured, offering… Versal Adaptive SoCs ONLINE WORKSHOP

  • How to Achieve Seamless Deployment of Level 3 Virtual ECUs for Automotive Digital Twins

    Driven by the trend towards software-defined vehicles (SDV), more complex software stacks are now being integrated into innovative automotive E/E architectures. Today the early integration testing of automotive software is already supported by using virtual ECUs (vECUs). However, the production basic software (BSW) is often not included because the virtualization of the hardware-specific microcontroller abstraction layer (MCAL)… How to Achieve Seamless Deployment of Level 3 Virtual ECUs for Automotive Digital Twins

  • Latch-Up 2023

    University of California, Santa Barbara Santa Barbara, CA, United States

    The FOSSi Foundation is proud to announce Latch-Up, a conference dedicated to free and open source silicon to be held over the weekend of Friday, March 31 to Sunday, April 2, 2023 in Santa Barbara, California, USA. Latch-Up is a weekend of presentations and networking for the open source digital design community, much like its European sister conference ORConf. So… Latch-Up 2023

  • Shorten Your CDC Debug Cycle by 10X with ML-based RCA

    Over the last few decades System on Chip (SoC) design size has dramatically increased, and more complexity has been introduced to deliver the desired functionality. Growing design sizes lead to the introduction of several asynchronous clocks which can result in the reporting of millions of clock domain crossings (CDC) at the IP/SoC level. This leads… Shorten Your CDC Debug Cycle by 10X with ML-based RCA

  • ISQED 2023

    Seven Hills Conference Center 800 Font Blvd, San Francisco, CA, United States

    The 24th International Symposium on Quality Electronic Design (ISQED'23) is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology,packaging, assembly & test to achieve total design quality. ISQED 2023 will held with the technical sponsorship of IEEE CASS, IEEE EDS, and in-cooperation with ACM/SigDA. Conference… ISQED 2023

  • Choosing the best modeling abstraction for your analysis

    This webinar cover the modeling abstraction in the design of electronics, semiconductors and software. This webinar will definitely improve your modeling skills! --Is the abstraction right for your application and design goal? --How do you accelerate the simulation using abstraction? --Can you change the model of computation using abstraction to simplify the modeling effort? During… Choosing the best modeling abstraction for your analysis

  • Enhance Productivity with Machine Learning in the Analog Front-End Design Flow

    Advanced semiconductor nanometer technology nodes, together with smart IC design applications enable today very complex and powerful systems for communication, automotive, data transmission, AI, IoT, medical, industry, energy harvesting, and many more. However, more aggressive time-to-market and higher performance requirements force IC designers to look for advanced and seamless design flows, tools & methodologies to… Enhance Productivity with Machine Learning in the Analog Front-End Design Flow

  • User2User North America

    Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United States

    U2U is your opportunity to learn, grow and connect with fellow technical experts who design leading-edge products using Siemens EDA tools. U2U is focused on these areas: Analog/Mixed-Signal Verification Calibre Design Solutions & Power Integrity Analysis Digital IC Implementation Functional Design & Verification Hardware-Assisted Verification High-Level Synthesis/Verification & RTL Power Estimation/Optimization Next Gen Packaging and… User2User North America