Skip to content

Avalon

LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)

Abstract: Today’s FPGAs and SoC FPGAs use various types of bus interconnect - such as AXI, APB, AHB, Avalon or Wishbone - for both internal (IP-level) and external communication. A recently added feature to Aldec’s ALINT-PRO allows designers to extract, review and verify the correctness of bus interface connections. In addition, ALINT-PRO is capable of… Read More »LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)

Synopsys CAD Navigation Users Group Meeting: Avalon & SysNav FA Solutions

Synopsys would like to invite you to the 4th annual, and 2nd virtual, Synopsys CAD Navigation Users Group to be held in March 2022. Date & Time: Thursday, March 24, 2022. 07:00 a.m. – 09:00 a.m. PT Venue Details: Virtual Conference We have planned an exciting event with presentations from a diverse group of CADNav… Read More »Synopsys CAD Navigation Users Group Meeting: Avalon & SysNav FA Solutions