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Advanced Physical Design using OpenLANE/Sky130
Physical Design or PnR (Place and Route) is the core of any IC design cycle. From a RTL netlist to final tape-out, each phase of PnR brings it’s own challenges and surprises. “What are these challenges?” “What is the process?” “Can I build a chip of my own?”- If you have these questions and if… Read More »Advanced Physical Design using OpenLANE/Sky130
CHIPS Alliance, Fall Technology Update
Join us in-person for our second biannual technology update featuring informative, technical talks on open source hardware collaborative development, hosted by Google and including speakers from Microsoft, Google, Intel, Antmicro, Efabless and others. CHIPS’ Thursday event follows the main RISC-V Summit days (Tuesday-Wednesday) to allow easy participation for open source hardware professionals traveling to the… Read More »CHIPS Alliance, Fall Technology Update