EmLogic
Latest Past Events
FPGA Front Runner: FPGA Safety and Security
The Cass Centre Shaftesbury Road, CambridgeThis event covers the challenges in ensuring an FPGA is secure and demonstrably safe as per the relevant industry safety standards. This includes supply chains, FPGA hardware and the IP used on the FPGA Agenda (GMT) Time Speaker Details 09.30 Arrival and registration 10.00 Tobias Adryan, Synopsys Securing FPGAs Beyond the Bitstream 10.30 Espen Tallaksen,… FPGA Front Runner: FPGA Safety and Security
FPGA Front Runner: FPGA Verification Strategies
Rolls Royce Control Systems 5000 Solihull Parkway, BirminghamTime Speaker Details 09.30 Arrival and Registration 10.00 Dave Sanders, Rolls-Royce Overview of Rolls Royce @ Solihull Presentation Title - Rolls-Royce… the past, the present and the future Abstract - Rolls-Royce has come a long way since its inception as a car manufacturer at the start of the twentieth century, for starters it doesn’t make cars anymore!… FPGA Front Runner: FPGA Verification Strategies
Making a Structured VHDL Testbench – A Demo for Beginners
Abstract: This demonstrated tutorial is intended for designers and verification engineers who want to learn to make better and more structured testbenches. This session will show you what is needed for any good testbench, irrespective of its complexity. We will make a testbench from scratch for a simple VHDL module and do the following: Add… Making a Structured VHDL Testbench – A Demo for Beginners