Join us for a free, half-day workshop on the key concepts of an ASIC design physical implementation flow using OpenROAD.  OpenROAD delivers a fast, barrier-free, and low-cost RTL-to-GDS, no-human-in-loop flow for design above 12nm and is one of the tools students can work with in UCSC Silicon Valley Extension VLSI Engineering program courses Knowing how to use open EDA tools boosts… Read More »ASIC Design Using OpenROAD