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Aldec, December 2, 2021

LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)

Abstract: Today’s FPGAs and SoC FPGAs use various types of bus interconnect – such as AXI, APB, AHB, Avalon or Wishbone – for both internal (IP-level) and external communication. A recently added feature to Aldec’s… LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)