The AXI4 Stream protocol is used as a standard interface to exchange data between connected IPs within FPGA designs. For crossing clock domains, the AXI4 Stream interconnect is based on switches capable of transferring data… Static and Dynamic CDC Verification of AXI4 Stream-based IPs
Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 2 of this presentation focuses on how to write tests and configure the… Using OSVVM’s AXI4 Verification Components
European Session Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 1 of this presentation provides a detailed walkthrough of creating a… Using OSVVM’s AXI4 Verification Components: Pt 1 Creating the AXI4 Testbench / Test Harness