Managing SoC Subsystems and Other Hierarchy With Methodics IPLM

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For the past 10+ years, semiconductor design has moved from a project-based “start again” mindset to a more modular, “IP-centric” approach. This has significantly reduced project cost and improved time-to-market by encouraging the outsourcing of niche areas of the design … Continued

Methodics User Group

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Join our monthly session with Methodics IPLM experts and other users for open discussion, Q&A, and product demos. Next Session: October 12 | 1:00 P.M. EST Each 30-minute session offers a new opportunity to: Learn/share best practices. Interact with and … Continued

Agile Planning for SoC Design

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Missed milestones, lack of traceability, and costly respins. These are examples of what you risk if you do not take planning seriously during semiconductor design. A rock-solid planning process in the SOC Design process is a must. At the same … Continued

Methodics User Group

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Our customers are always coming to us with great questions, and in response discovering unique solutions, but we’ve never had a forum to share these learnings to our wider customer base. I’ve been considering a forum for discussing best practices … Continued