2 events found.
Advanced Testbench for a Simple DUT
Abstract: Functional simulation using an HDL testbench is the de facto method for proving functional correctness of FPGA designs. In this three-part webinar series, we will present a step-by-step approach… Advanced Testbench for a Simple DUT
Accelerate Software Innovation Through Target-Optimized Code Generation and Virtual Prototypes
Increasingly complex automotive systems are driving the need for new and powerful E/E architectures, and new technology is emerging that offers a significant computational increase compared to previous generation SoCs.… Accelerate Software Innovation Through Target-Optimized Code Generation and Virtual Prototypes