IP
Calendar of Events
S Sun
M Mon
T Tue
W Wed
T Thu
F Fri
S Sat
0 events,
0 events,
1 event,
RISC-V Instruction Set Architecture: Enhancing Computing Power
RISC-V Instruction Set Architecture: Enhancing Computing Power
*Work email required for registration* Don't miss out on this exclusive opportunity to stay ahead in the rapidly evolving landscape of chip design. Join us for an engaging discussion that promises to inspire and inform: - Gain insights into the latest trends shaping chip design. - Learn from industry leaders about the strategies behind successful… Read More »RISC-V Instruction Set Architecture: Enhancing Computing Power
1 event,
Siemens EDA User2User Conference
Engineer a smarter future, faster at Siemens EDA User2User Conference April 3-4, 2024 Santa Clara, CA. Join your colleagues from around the industry for a day of technical sessions, networking, keynote sessions, labs and more. User2User is free of charge for Siemens EDA customers and includes sessions, lunch, and parking. Technology tracks covering the latest… Read More »Siemens EDA User2User Conference
1 event,
0 events,
0 events,
0 events,
0 events,
1 event,
Embedded World 2024
The embedded world Exhibition&Conference provides a global platform and a place to meet for the entire embedded community, including leading experts, key players and industry associations. It offers unprecedented insight into the world of embedded systems, from components and modules to operating systems, hardware and software design, M2M communication, services, and various issues related to… Read More »Embedded World 2024
1 event,
1 event,
0 events,
0 events,
0 events,
0 events,
0 events,
2 events,
Exploring the Advancement of Chiplet Technology and the Ecosystem
Exploring the Advancement of Chiplet Technology and the Ecosystem
Semiconductor companies are making transistors smaller and cramming more into chips to meet the demands of today’s high-tech industries and applications. In fact, in a recent article from the Financial Times, technology industry consultants McKinsey forecast that semiconductors will become a trillion-dollar industry by the end of this decade. Even with this massive growth, manufacturers recognize the… Read More »Exploring the Advancement of Chiplet Technology and the Ecosystem
CadenceLIVE Silicon Valley 2024
CadenceLIVE Silicon Valley 2024
Join us for CadenceLIVE Silicon Valley 2024 on April 17 at the Santa Clara Convention Center. This annual user conference features peer presentations that offer solutions for today’s design challenges that will impact tomorrow’s products. CadenceLIVE brings users, developers, and industry experts together to connect, share ideas, and inspire design creativity. Attendees have the opportunity… Read More »CadenceLIVE Silicon Valley 2024
2 events,
Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the chiplet-based SoC requires multiple interconnect protocol models, and multiple coherent and non-coherent compute resources. This Webinar will demonstrate a methodology for rapid modeling and architecture trade-off using UCIe in modeling… Read More »Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the chiplet-based SoC requires multiple interconnect protocol models, and multiple coherent and non-coherent compute resources. This Webinar will demonstrate a methodology for rapid modeling and architecture trade-off using UCIe in modeling… Read More »Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
1 event,
Latch-Up 2024: Boston
Friday to Sunday April 19–21, 2024 in Boston, MA, USA The Latch-Up conference is a weekend of presentations and networking dedicated to free and open source silicon. It's an event for the open source digital design community, much like its European sister conference ORConf, run by the FOSSi Foundation. You are all invited! The FOSSi… Read More »Latch-Up 2024: Boston
1 event,
2 events,
CICC 2024
The IEEE Custom Integrated Circuits Conference is a premier conference devoted to IC development. The conference program is a blend of oral presentations, exhibits, panels and forums. The conference sessions present original first published technical work and innovative circuit techniques that tackle practical problems. CICC is the conference to find out how to solve design… Read More »CICC 2024
1 event,
1 event,
1 event,
2 events,
IP-SoC Silicon Valley 2024
IP-SoC Silicon Valley 2024
A worldwide connected Event !! D&R IP-SoC Silicon Valley 2024 Day is the unique worldwide Spring event fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems. IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services and share their vision about the next innovation… Read More »IP-SoC Silicon Valley 2024
The Era of Software-Defined Everything: Chiplets and Bespoke Silicon
The Era of Software-Defined Everything: Chiplets and Bespoke Silicon
From fintech to automotive, defense to healthcare, everyone wants bespoke computing platforms to build "software-defined solutions" that are differentiated in their respective markets. Sign up and save your spot for this special presentation. Overview With the advent of 3D ICs and heterogeneous semiconductor integration, mapping a system on a customized chip/hardware is accessible to "everyone.”… Read More »The Era of Software-Defined Everything: Chiplets and Bespoke Silicon
0 events,
0 events,
0 events,
1 event,
TechNES FPGA Front Runner Event
TechNES FPGA Front Runner Event
The FPGA Front Runners event will be hosted by Renishaw at their venue in Wotton-under-Edge. The event will focus on “Using AI in development and product for FPGA”. If you are interested in speaking at this event please email mike.bartley@techworks.org.uk Topics for talks: What AI support is being built into the FPGA fabrics? How are… Read More »TechNES FPGA Front Runner Event
1 event,
CXL DevCon 2024
The CXL Consortium is looking forward to hosting the first Compute Express Link® (CXL®) DevCon from April 30 – May 1, 2024, in Santa Clara, California! CXL DevCon is a unique opportunity for our Members to learn directly from CXL technology experts. Attendees will participate in CXL technical training, view available products and technology demonstrations,… Read More »CXL DevCon 2024
1 event,
TSMC 2024 Technology Workshop – Austin
TSMC 2024 Technology Workshop – Austin
08:30 – 09:30 Registration & Partner Pavilion 09:30 – 09:40 Welcome & Opening Remarks 09:40 – 10:00 Market Outlook – Powering AI Together 10:00 – 10:30 Advanced Technology Leadership 10:30 – 11:00 Coffee Break & Ecosystem Pavilion 11:00 – 11:25 Specialty Technology Leadership 11:25 – 11:50 Manufacturing Excellence 11:50 – 13:00 Lunch & Ecosystem Pavilion… Read More »TSMC 2024 Technology Workshop – Austin