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Latest Innovations and Updates in ASICs with Efabless
In this webinar Jeff DiCorpo & Matt Venn will delve into the latest ASIC developments, including the game-changing OpenFrame – a new Caravel version expanding your design possibilities by 50%. Topics Include: OpenFrame - a new version of Caravel that gives 50% more area GPIO configuration questions The new cocotb testing framework IPM - The… Latest Innovations and Updates in ASICs with Efabless
Latest Innovations and Updates in ASICs
In this webinar Jeff DiCorpo & Matt Venn will delve into the latest ASIC developments, including the game-changing OpenFrame – a new Caravel version expanding your design possibilities by 50%. Topics Include: - OpenFrame - a new version of Caravel that gives 50% more area - GPIO configuration questions - The new cocotb testing framework… Latest Innovations and Updates in ASICs
Using Generative AI for ASIC Design
Tools like ChatGPT can be used for a variety of purposes, including writing Verilog. Unfortunately, these models are not (yet) perfect, and the quality of the output varies heavily depending on how you use them. Just as models may "hallucinate" facts they are not certain about, they can also "hallucinate" buggy and non-functional Verilog. In… Using Generative AI for ASIC Design