Using Generative AI for ASIC Design

Tools like ChatGPT can be used for a variety of purposes, including writing Verilog. Unfortunately, these models are not (yet) perfect, and the quality of the output varies heavily depending on how you use them. Just as models may “hallucinate” facts they are not certain about, they can also “hallucinate” buggy and non-functional Verilog.

In this presentation, Dr. Hammond Pearce will present how he designed his team’s entry to the last Efabless AI-Generated Open-Source Silicon challenge, with practical tips and techniques via a demo and discussion of their results: an 8-bit processor wholly designed by ChatGPT.