HBM
Scalable HPC platform and memory expansion techniques using Die-to-Die and LPDDR subsystems
With advanced packaging and interface solutions, it is possible to connect multiple CPU clusters (near or far) and share external memory resources among them. We will review some of the IPs required to build such a platform and recommend applications that can benefit from it. This webinar will be useful to designers, architects, and application… Read More »Scalable HPC platform and memory expansion techniques using Die-to-Die and LPDDR subsystems
Protocol and Memory Interface Verification in the Shrinking World of 3DIC
Emerging 2.5D and 3DIC packaging technologies enable more design complexity, and bring some new verification challenges. We look at how to scale your verification capability to match and how to plan ahead for verification of die-to-die interconnect protocols such as UCIe and memory verification with HBM. Packaging technologies for 2.5D and 3DIC are becoming more… Read More »Protocol and Memory Interface Verification in the Shrinking World of 3DIC