The steering committee of the IEEE ASYNC symposium is organizing a summer school on asynchronous design.  The goal of the school is to teach asynchronous chip design to students and practitioners interested in digital hardware design.  Participants will learn how to design asynchronous circuits at the behavioral level, gate level, and physical design level using… Read More »ASYNC 2022 Summer School: Behavioral Design

The steering committee of the IEEE ASYNC symposium is organizing a summer school on asynchronous design.  The goal of the school is to teach asynchronous chip design to students and practitioners interested in digital hardware design.  Participants will learn how to design asynchronous circuits at the behavioral level, gate level, and physical design level using… Read More »ASYNC 2022 Summer School: Gate-level Design

The steering committee of the IEEE ASYNC symposium is organizing a summer school on asynchronous design.  The goal of the school is to teach asynchronous chip design to students and practitioners interested in digital hardware design.  Participants will learn how to design asynchronous circuits at the behavioral level, gate level, and physical design level using… Read More »ASYNC 2022 Summer School: Physical Design