Low Power
Pre-empt Late-stage Low Power Issues using Predictive Analysis
Low power is an increasingly critical requirement for all modern SoCs. Moreover, it is becoming more and more difficult with complex architectures being used in modern designs. This has made it necessary for designers to invest heavily in this verification effort throughout the design development cycle starting from architecture definition, RTL development, to final netlist tape-out. Conventionally, static low power flow constitutes defining and cleaning… Read More »Pre-empt Late-stage Low Power Issues using Predictive Analysis
Driving Low-Power Design with High-Level Synthesis
With the growth in computing at the edge driven by the explosion of battery-powered smart devices, designing for low power is mission-critical to product success. Numerous techniques, spanning all stages of design, are employed to reduce power. Since many of the low-power design techniques come at a cost in performance, the key design challenge continues… Read More »Driving Low-Power Design with High-Level Synthesis