Real Number Modeling
Events
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Mixed-Signal SoC Verification Simplified with Xcelium Simulator
Analog and mixed-signal verification has always been a challenge for design and verification engineers. It has become tedious with the increasing complexity of SoC designs. Because the analog behavior of key design blocks cannot be simulated effectively using traditional verification methodologies, new methodologies and solutions like real number modeling (RNM) for analog functional blocks are… Mixed-Signal SoC Verification Simplified with Xcelium Simulator
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Xcelium: The Key to Unlocking Unmatched Mixed-Signal Performance
Xcelium mixed-signal simulation enables teams to achieve digital simulation speeds of analog models and opens mixed-signal designs to advanced verification techniques typically applied within standard verification flows. Built on a SystemVerilog Real Number Modeling (RNM) foundation, Xcelium automates the signal integration of digital and RNM code to achieve digital simulation speeds for mixed-signal designs. This… Xcelium: The Key to Unlocking Unmatched Mixed-Signal Performance