Scientific Analog
Automatic Generation of SystemVerilog Models from Analog/Mixed-Signal Circuits: a Pipelined ADC Example
When verifying large SoC designs, one needs to write SystemVerilog models for analog/mixed-signal blocks to comply with the digital verification flow, such as UVM. This talk addresses ways to extract those models automatically from circuits. The first approach is called structural modeling, mapping each device in the circuit to an equivalent model in SystemVerilog and… Automatic Generation of SystemVerilog Models from Analog/Mixed-Signal Circuits: a Pipelined ADC Example
Writing UVM/SystemVerilog Testbenches for Analog/Mixed-Signal Verification
Learn how to write UVM testbenches for analog/mixed-signal circuits. UVM (Universal Verification Methodology) is a framework of standardized SystemVerilog classes to build reusable and scalable testbenches for digital designs, and it can be extended to verifying analog circuits simply by using a fixture module that generates analog stimuli and measures analog responses with Scientific Analog's… Writing UVM/SystemVerilog Testbenches for Analog/Mixed-Signal Verification
UCIe PHY Modeling and Simulation with XMODEL
Chiplets are emerging as a new way of building IC systems via heterogeneous integration, and Universal Chip Interconnect Express (UCIe) is one of the standards defining the interconnects among chiplets. This webinar presents the SystemVerilog models of a Universal Chiplet Interconnect Express (UCIe) interface, including both the analog circuits in the electrical layer and digital… UCIe PHY Modeling and Simulation with XMODEL
ASP-DAC 2024
Incheon Songdo Convensia 123 Central Street, Yeonsu-gu, Incheon, Korea, Democratic People's Republic ofASP-DAC 2024 is the 29th annual international conference on VLSI design automation in Asia and South Pacific regions, one of the most active regions of design, CAD and fabrication of silicon chips in the world. The conference aims at providing the Asian and South Pacific CAD/DA and Design community with opportunities of presenting recent advances… ASP-DAC 2024
DVCon USA 2024
The DoubleTree by Hilton 2050 Gateway Place, San Jose, CA, United StatesThe Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees… DVCon USA 2024
DAC 2024
Moscone West San Francisco, CA, United StatesThe premier event for the design and design automation of electronic chips to systems. Autonomous Systems Electronics content in modern autonomous systems (e.g., automotive, robotics, drones, etc.) is growing at an increasingly rapid pace. Nearly every aspect of these complex systems uses smart electronics and embedded software to make our experiences safer, more energy-efficient and enjoyable. For… DAC 2024
Modeling and Simulation of Silicon Photonics Systems in SystemVerilog
Silicon photonics systems integrate photonic components such as optical waveguides, couplers, resonators, photodetectors, etc. along with electronic components on the same silicon chip to realize high-bandwidth, high-density, and low-power communication via wavelength-division multiplexing (WDM). This talk will address the challenges of modeling and simulating silicon photonics WDM transceivers in SystemVerilog, which contain photonic devices for… Modeling and Simulation of Silicon Photonics Systems in SystemVerilog
DVCON US 2025
The DoubleTree by Hilton 2050 Gateway Place, San Jose, CA, United StatesThe Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees… DVCON US 2025