Silvaco
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Silvaco UseRs Global Event (SURGE) 2023 – Taiwan/Singapore
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing advanced designs. Presentations A variety of presentations will cover semiconductor device simulation, circuit design and verification, and IP design. Roadmaps and exciting technology updates will… Silvaco UseRs Global Event (SURGE) 2023 – Taiwan/Singapore
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Silvaco UseRs Global Event (SURGE) 2023 – Japan
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing advanced designs. Presentations A variety of presentations will cover semiconductor device simulation, circuit design and verification, and IP design. Roadmaps and exciting technology updates will… Silvaco UseRs Global Event (SURGE) 2023 – Japan
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Silvaco UseRs Global Event (SURGE) 2023 – China
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing advanced designs. Presentations A variety of presentations will cover semiconductor device simulation, circuit design and verification, and IP design. Roadmaps and exciting technology updates will… Silvaco UseRs Global Event (SURGE) 2023 – China
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69th International Electron Devices Meeting – IEDM
Hilton San Francisco Union Square 333 O'Farrell Street, San Francisco, United StatesIEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. IEDM is the flagship conference for nanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices, novel quantum and nano-scale devices and phenomenology, optoelectronics, devices for… 69th International Electron Devices Meeting – IEDM
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Power Devices SPICE Modeling for Si, GaN and SiC Technologies
We start by examining the different technologies used in the manufacturing of power devices, including Si, GaN, and SiC, considering their respective particularities and advantages. We will then analyze various approaches to the SPICE modeling of power devices, including compact models and macromodels. A significant portion of our presentation will be dedicated to the topic… Power Devices SPICE Modeling for Si, GaN and SiC Technologies
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Analyze the Impact of Surface Defect Dot on Short Circuit Phenomena in SiC Devices
Learn How STMicroelectronics Silicon Carbide (SiC) Research Team uses Silvaco TCAD to Analyze the Impact of Surface Defect Dot on Short Circuit Phenomena in SiC Devices During SiC device switching operations, it is possible that devices could be reaching abnormal overload conditions, which is why some applications require “robustness” specifications (e.g., Short Circuit and UIS… Analyze the Impact of Surface Defect Dot on Short Circuit Phenomena in SiC Devices
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CS Inernational Conference
Sheraton Brussels Airport Hotel Brussels, Belgiumhe 14th CS International builds on the strengths of its predecessors, with around 40 leaders from industry and academia delivering presentations that fall within five key themes: Ensuring SiC’s Phenomenal Success; Expanding Horizons for Surface Emitters; Accelerating the Growth of GaN; Taking Power from the Photon; and New Frontiers for the LED. Those attending these… CS Inernational Conference
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TSMC 2024 China Technology Symposium
Shanghai International Convention Center No. 2727, Riverside Avenue, Shanghai, ChinaGet the latest on: TSMC's industry-leading HPC, smartphone, IoT, and automotive platform solutions TSMC’s advanced technology progress on 5nm, 4nm, 3nm, 2nm processes and beyond TSMC’s specialty technology breakthroughs on ultra-low power, RF, embedded memory, power management, sensor technologies, and more TSMC 3DFabric™ advanced packaging technology advancement on InFO, CoWoS®, and TSMC-SoIC® TSMC’s manufacturing excellence,… TSMC 2024 China Technology Symposium
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DAC 2024
Moscone West San Francisco, CA, United StatesThe premier event for the design and design automation of electronic chips to systems. Autonomous Systems Electronics content in modern autonomous systems (e.g., automotive, robotics, drones, etc.) is growing at an increasingly rapid pace. Nearly every aspect of these complex systems uses smart electronics and embedded software to make our experiences safer, more energy-efficient and enjoyable. For… DAC 2024
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Developing Silicon Carbide DMOSFETS: A Digital Twin Reference Flow
This webinar presents a comprehensive methodology for the design and optimization of a 1200V Silicon Carbide (SiC) Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistor (DMOS FET) utilizing Silvaco's TCAD platform. Adhering to industry best practices, the construction of an accurate digital twin is also presented, ensuring conformity to real-world performance characteristics. Moreover, we outline strategies to streamline simulation… Developing Silicon Carbide DMOSFETS: A Digital Twin Reference Flow
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Developing Silicon Carbide DMOSFETS: A Digital Twin Design Reference Flow
This webinar presents a comprehensive methodology for the design and optimization of a 1200V Silicon Carbide (SiC) Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistor (DMOS FET) utilizing Silvaco's TCAD platform. Adhering to industry best practices, the construction of an accurate digital twin is also presented, ensuring conformity to real-world performance characteristics. Moreover, we outline strategies to streamline simulation… Developing Silicon Carbide DMOSFETS: A Digital Twin Design Reference Flow
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Applying Artificial Intelligence in Fab Technology Co-Optimization
The common approach to optimize a fabrication process involves process and fab engineers creating and setting up Design of Experiments (DoEs) using a trial-and-error approach. This approach often leads to costly iterations since wafer fabrication is both expensive and time-consuming. Typically, it can take weeks to months of experimentation, depending on what process parameters are… Applying Artificial Intelligence in Fab Technology Co-Optimization