Simon Butler
Events
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Agile Planning for SoC Design
Missed milestones, lack of traceability, and costly respins. These are examples of what you risk if you do not take planning seriously during semiconductor design. A rock-solid planning process in the SOC Design process is a must. At the same time, the era of innovation is changing the way teams organize their work. Driven by…
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Managing SoC Subsystems and Other Hierarchy With Methodics IPLM
For the past 10+ years, semiconductor design has moved from a project-based "start again" mindset to a more modular, "IP-centric" approach. This has significantly reduced project cost and improved time-to-market by encouraging the outsourcing of niche areas of the design to specialists, enabling the use of foundry sourced IP (often for free) and emphasizing the…
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Methodics User Group – November
Join our monthly session with Methodics IPLM experts and other users for open discussion, Q&A, and product demos. Next Session: November 9 | 1:00 P.M. EST Each 45-minute session offers a new opportunity to: Learn/share best practices. Interact with and learn from other users. Have Q&A time with our product experts on usage and methodology.…
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Methodics User Group (MUG) – April 12, 2022
If your company uses 3rd party IP in their design process, it is important to consider how you will manage them to extract maximum leverage. Having a central library and consistent processes for managing both internal and 3rd party IP is vital step to get the most your investment. Learn how you can optimize 3rd…
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Methodics User Group
As a result of the pandemic, many semiconductor organizations started looking at cloud solutions to support remote team members. But moving semiconductor design workflows to cloud has several challenges — security concerns, cloud access controls, employees unfamiliar with the technology, and more. Learn more about cloud-based semiconductor design and how to conquer these challenges. Checkout…
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IP Lifecycle Management for Chiplet-Based SoCs
Chiplet-based SoC architectures have seen increased interest over the past three years, and recently were made a focus of the federal CHIPS and Science Act to reduce the cost of innovation for US-based semiconductor startups, DoD projects, and academic research. Chiplet-based architectures bring their own set of challenges however, especially in the context of IP…