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NPU

Mirabilis, April 18, 2024

Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP

Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the… Read More »Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP

Synopsys, December 20, 2022

Using Formal Datapath Validation to Verify AI Processor Computations

For over a decade, CPU and GPU design companies have been using Synopsys VC Formal Datapath Validation (DPV) app with its HECTOR™ technology to verify… Read More »Using Formal Datapath Validation to Verify AI Processor Computations