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SI/PI

Cadence, May 2, 2023

Design Robust IC Packages Faster Using In-Design SI/PI Analysis

IC package design teams and characterization teams have had a “throw-it-over-the-wall” relationship for decades, which often delays design releases by months. However, as signal integrity… Read More »Design Robust IC Packages Faster Using In-Design SI/PI Analysis

Cadence, May 19, 2022

Conquer SI/PI Challenges and Reduce Time to Signoff for PCIe 6.0

The Peripheral Component Interconnect Express (PCIe®) high-speed interface has become the standard for computer expansion cards due to its high bandwidth combined with manageable component… Read More »Conquer SI/PI Challenges and Reduce Time to Signoff for PCIe 6.0

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