Chiplet-based SoC architectures have seen increased interest over the past three years, and recently were made a focus of the federal CHIPS and Science Act to reduce the cost of innovation for US-based semiconductor startups,… IP Lifecycle Management for Chiplet-Based SoCs
As a result of the pandemic, many semiconductor organizations started looking at cloud solutions to support remote team members. But moving semiconductor design workflows to cloud has several challenges — security concerns, cloud access controls,… Methodics User Group
If your company uses 3rd party IP in their design process, it is important to consider how you will manage them to extract maximum leverage. Having a central library and consistent processes for managing both… Methodics User Group (MUG) – April 12, 2022
Join our monthly session with Methodics IPLM experts and other users for open discussion, Q&A, and product demos. Next Session: November 9 | 1:00 P.M. EST Each 45-minute session offers a new opportunity to: Learn/share… Methodics User Group – November
For the past 10+ years, semiconductor design has moved from a project-based “start again” mindset to a more modular, “IP-centric” approach. This has significantly reduced project cost and improved time-to-market by encouraging the outsourcing of… Managing SoC Subsystems and Other Hierarchy With Methodics IPLM
Missed milestones, lack of traceability, and costly respins. These are examples of what you risk if you do not take planning seriously during semiconductor design. A rock-solid planning process in the SOC Design process is… Agile Planning for SoC Design