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primarius, October 1, 2024

Interactive SPICE Model Verification Platform ME-Pro

ME-Pro™ is a unified tool for designers, process developers, modeling engineers, and PDK engineer providing robust simulation and analysis capabilities for semiconductor device model verification and evaluation. This comprehensive platform supports evaluation across device, circuit,… 

topgolf

Siemens EDA Custom IC Verification Forum – Austin, TX

Join us and learn how Siemens’ intelligent Custom IC Verification platform is transforming the custom IC verification landscape with AI-powered methods and the latest in circuit simulation technology! Our expert speakers will provide insight on… 

Ansys, August 20, 2024

Mastering EMC Simulations for Electronic Designs

Overview Electromagnetic Compatibility (EMC) simulation is critical for ensuring that electronic devices comply with regulatory standards and perform optimally in their intended environments. As the complexity of electronic systems increases, the importance of EMC simulation… 

Siemens, April 24, 2024

Deploying Solido Design Environment AI Workflows on AWS

Utilizing AWS cloud resources to accelerate variation-aware verification   AI-powered Solido Design Environment provides SPICE-accurate variation-aware verification for 3, 4, 5, 6 and higher sigma targets, orders of magnitude faster than traditional brute-force methods. With cloud… 

Siemens, February 20, 2024

SPICE-accurate variation-aware verification best practices with Solido AI-powered technologies

The demand for Custom ICs is on the rise globally along with high proliferation of semiconductor content. Higher requirements on power, performance, area, and yield, as well as other factors such as advanced process nodes… 

Silvaco, June 9, 2022

How to Eliminate Image Retention Issues with SmartSpice Flex Modeling

Image retention is a long-standing issue in the display community. To effectively solve this issue, or even to minimize its impact on their products, display manufacturers and consumer electronics vendors need to simulate this effect… 

MunEDA

Optimal circuit sizing strategies for performance, low power, and high yield of analog and full custom IP

There have always been good reasons to port designs to new foundries or processes. These reasons have included reusing IP in new projects, moving an entire design to a smaller node to improve PPA, or…