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Cadence, September 27, 2023

Stratus HLS Automated Power Shutoff to Minimize Power and Retention Registers

Power Shutoff is a popular technique for saving power during functionally idle periods. Implementing Power Shutoff requires a detailed understanding of which resisters must be retained to enable bring-up from the power-off state. Identifying the… Stratus HLS Automated Power Shutoff to Minimize Power and Retention Registers

Cadence, September 22, 2022

From MATLAB to Optimized RTL in Minutes

As semiconductor process technology advances, predicting and achieving design power, performance, and area (PPA) goals become increasingly difficult. Developing high-performance algorithms for AI and signal processing is particularly challenging as algorithm development is abstracted from… From MATLAB to Optimized RTL in Minutes