A worldwide connected Event !!
IP-SoC 2024 will be the 27th edition of the working conference fully dedicated to IP (Silicon Intellectual Property) and IP based electronic systems.
The event is the annual opportunity for IP providers and IP consumers to share information about technology trends, innovative IP SoC products, Breaking IP/SoC News, Market evolution and more.
The Grenoble event is a special event as it is also the annual IP Think Tank meeting where high level executives, market analyzer and technical experts from Foundry/technology, to new applications share their vision about the future of the IP concept. It will be the right time to analyze the fast evolution and consolidation in the IP market and IP business.
As far as the application domains are concerned it is important to give high to new application domains and take into account new system requirements such as 3D packaging, Security, Artificial Intelligence, …
Any question? Please contact us
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9.00 am
Welcome Session
Chairperson: Gabrièle Saucier – Design And Reuse
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IP SoC Community: EU as a main player ?
Gabrièle Saucier
CEO
Design And Reuse
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The network evolution and radio implications
Fredrik Tillman
Head of Integrated Radio Systems
Ericsson
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Increased competitiveness and sustainability in connectivity with advanced substrates solutions
Francois Brunier
Partnership Program Manager
Soitec
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Chips Act and EU design Platform
Olivier Thomas
CEA
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10.20 am
Break |
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11.00 am
Interface IP
Chairperson: Olivier Thomas – CEA
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The Critical Role of PCIe 7.0 & CXL 3.1 Solutions in Enabling AI applications
Bart Stevens
Senior Director of Product Marketing
Rambus, Inc.
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| IoT Solutions |
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How to select the best Audio codec architecture to enhance your wearables?
Etienne Faucher
Product Marketing Manager
Dolphin Semiconductor
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Wireless and Batteryless Interface for IoT
Polina Proskurova
Project Manager
NTLab
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12.00 pm
Lunch Break |
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1.00 pm
Automotive Solutions |
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Towards a Sustainable Automobile: Reinventing the Industry for Green and Circular Mobility
Jerome Fohet
Marketing and Communications Director
Soitec
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Silicon Lifecycle Management (SLM) in context of Chiplets for Automotive
Graham Woods
Principal Product Manager
Synopsys, Inc.
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Protecting Automotive Networks with MACsec Security
Bart Stevens
Senior Director of Product Marketing
Rambus, Inc.
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Cyber Resilience and Safety in Automotive: How Security IP Provides Essential Primitives for Compliance
Gordon Fairley
Kudelski IoT
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2.30 pm
Break |
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2.45 pm
Security IP
Chairperson: Bart Stevens – Rambus, Inc.
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Secure-IC Differential Loop PUF : Overcoming some weaknesses of the traditional Loop PUF while enhancing its usability
Brice GAIGNOUX
Pre-Sales Engineer EMEA
Secure-IC
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The CHERI Alliance – getting security embedded into electronic systems
Mike Eftimakis
Founding Director
CHERI Alliance
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Integrated Security Solutions: How SRAM-based PUF Augments Embedded Hardware Secure Modules in a Post-Quantum World
Erik van der Sluis
Principal R&D Engineer
Synopsys, Inc.
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Security Verification in SoCs
Ali Hmedat
Senior Design vérification Engineer
AEDVICES CONSULTING
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4.00 pm
Break |
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4.20 pm
Wireless Solutions |
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InCirT Pioneers High-Performance Data Converter Technologies for Next-Gen Wireless Communications
Dr.-Ing. Oner Hanay
CEO
InCirT GmbH
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Battle of the Bits: Evaluating Lossless Data Compression Algorithms and Cores
Dr. Calliope-Louisa Sotiropoulou
Sales Engineer
CAST, Inc.
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5.00 pm
Break |
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5.30 pm
Open Panel: Greener Electronics: a myth or a reality ? |
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6R Greenness Profiling for IC and Boards
Gabrièle Saucier
CEO
Design And Reuse |
with
Dagmara Zielinska
Design And Reuse
and
Arnaud Serra
Design And Reuse
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IC Life time modeling : a critical parameter for Greener Electronics
HN Nguyen
CTO
METASymbiose
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Strategic decision-making in the semiconductor sector: shifting from relative to absolute sustainability
Thibault Pirson
PhD, research assistant
UCLouvain
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19.00 pm
Join the wine tasting party sponsored by Soitec
Do not miss D&R banquet |
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9.00 am
Analog Design |
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How to Enhance Energy Efficiency and Reduce Costs with Advanced In-Situ Sensors?
Vincent Telandro
Product Marketing Manager
Dolphin Semiconductor
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Standardizing CDC and RDC abstract models
Jean-Christophe Brignone
SMTS
STMicroelectronics
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Design Platform and Design Flow
Chairperson: Erkan Isa – Fraunhofer-Gesellschaft
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Make Chip: the one and only turnkey 22FDX design environment
Patrick Döll
Physical IC Design Engineer
Racyics GmbH
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Keysom Studio – Design Space Exploration of processor architectures
Luca TESTA
Cofounder & COO
Keysom
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Standard EDA tools based asynchronous design flow
GODARD Adrien
PhD student
STMicroelectronics
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Automated Abstractions: High-Level Model Generation from Design Specifications or RTL Descriptions
ANDRIAMISAINA Choukataly-Caaliph
CEA
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| Migration and Yield Consideration |
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Porting ASIC IP Cores to FPGA: It’s Not a Cakewalk!
Philipp Jacobsohn
Principal Application Engineer
SmartDV Technologies
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Niche gets super niche in the SEMI conductor Equipment domain
P SRINIVASA RAGHAVAN
Practice Head, Semiconductor BU
HCL TECH
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12.00 pm
Lunch Break |
What’s new on FDSOI: the SOIL Project
Chairperson: Philippe Flatresse – Soitec
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Solidify the European FDSOI ecosystem and accelerating its industrial deployment; A Chips JU initiative
Martin LABRUNE
European & France Public Affairs
STMicroelectronics
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Designing Intelligence from our SOIL
Krishna Pradee
Soitec
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Innovating the Future with SOIL: Next-Gen IPs, Transfer from Research to Silicon
Damian Panter
Fraunhofer
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From silicon to the use cases, SOIL as a test bench for automotive applications
Leonardo Govoni
AED Vantage GmbH
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| FDSOI IP |
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Market Available FDSOI IP
Dagmara Zielinska
Partnership Program Manager
Design And Reuse
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Designing SOC with ABX® – Challenges and Solutions
Florian Bilstein
Director Design Service
Racyics GmbH
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Ultra-wide band digital-to-analogue converter for wireless communication
Dr.-Ing. Oner Hanay
CEO
InCirT GmbH
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Panel: Building a strong FDSOI Ecosystem: A Catalyst for Tomorrow’s market wide Applications
Organizer:  Philippe Flatresse – Soitec
FDSOI Technology has been over for quite a long time. This panel will investigate whether or not the technology and Ecosystem supporting this technology worldwide have now reached its full maturity or are still in a growing phase. The panel groups FDSOI technology specialists, FDSOI Business managers, researchers and FDSOI IP providers.
With the participation of:
Olivier Thomas
CEA
Rainer Lutz
Soitec
Anton Klotz
Fraunhofer
Florian Bilstein
Racyics GmbH
Michel Vasmer
Capgemini Engineering
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17.00 pm
Join the reception organized by the European SOIL FDSOI Ecosystem |
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