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Simulating AMD’s next-gen Versal Adaptive SoC devices using Questasim
Versal Adaptive SoC, a revolutionary adaptable platform developed by AMD, integrates several key components such as the AI Engine (AIE), Processing System (PS), Programmable Logic (PL), Network on Chip (NoC), and a diverse array of specialized IPs. This innovative platform facilitates the efficient execution of intricate algorithms spanning from machine learning to high-performance computing tasks. In our upcoming webinar, we aim to provide an in-depth guide on running simulation flows for a Versal Adaptive SoC. Additionally, we’ll delve into QEMU, the open-source system emulator, and its co-simulation interface with Questa. Demonstrating how to conduct a system simulation of a Versal example design will be a focal point, showcasing Questa’s support for system simulation of Versal designs based on the Vitis™ hardware emulation flow. This comprehensive setup, including hardware emulation and system integration, is seamlessly achieved within the Vitis environment. It incorporates the AIE simulator for graph applications, Questasim for PL kernels, and QEMU for PS host applications.
What you will learn:
How to use Questa to simulate AMD’s Versal Adaptive SoC designs
Who should attend:
Users Looking into the latest AMD Versal devices and wanting to simulate the designs using a commercial simulator
What/Which Products are Covered:
- Questasim
Fan Zhang is currently a Product Engineer at Siemens EDA Software. He has been working in Design and Verification, and EDA companies for the last 16 years. He graduated with a MS in Computer Engineering from Texas A&M University.
He previously worked at AMD as a Design Engineer, Nvidia and Cadence as a Verification Engineer before joining Siemens as a Product Engineer.
Fan likes to go hiking and camping in his spare time and loves to swim.