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46th Annual EOS/ESD Symposium & Exhibits

Peppermill Resort and Casino 2707 South Virginia Street, Reno, NV, United States

The EOS/ESD Symposium is dedicated to the understanding of issues related to electrostatic discharge and electrical transients/overstress, and the application of this knowledge to the solution of problems in consumer, industrial, and automotive applications, including electronic components, as well as in systems, subsystems, and equipment.

DVCon India 2024

Hotel Radission Blu, Marathalli ORR 90/4 Outer Ring Road, Bengaluru, India

On behalf of the DVCon India 2024 steering committee, it is my pleasure to welcome you all to the 9th edition of the Design and Verification Conference in India planned from 18- 19th September 2024 in Bangalore, India. The theme of this year’s conference is “Architecture to Analytics – A2A“. We want to carry forward… Read More »DVCon India 2024

FPGA Front Runner: FPGA Verification Strategies

Rolls Royce Control Systems 5000 Solihull Parkway, Birmingham, United Kingdom

Time Speaker Details 09.30 Arrival and Registration 10.00 Dave Sanders, Rolls-Royce Overview of Rolls Royce @ Solihull Presentation Title - Rolls-Royce… the past, the present and the future Abstract - Rolls-Royce has come a long way since its inception as a car manufacturer at the start of the twentieth century, for starters it doesn’t make cars anymore!… Read More »FPGA Front Runner: FPGA Verification Strategies

SISPAD 2024

The Westin San Jose 302 S Market Street, San Jose, CA, United States

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of leading-edge research and development in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano electronic structures.… Read More »SISPAD 2024

TSMC North America OIP Ecosystem Forum 2024

Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United States

Learn About: Emerging advanced node design challenges and corresponding design flows and methodologies for A16, N2 and N3 processes Latest updates on TSMC 3DFabric™ chip stacking and advanced packaging processes, InFO, CoWoS®, and SoIC, 3DFabric Alliance, and 3Dblox™ standard, plus innovative 3Dblox-based design enablement technologies and solutions, targeting HPC, AI/ML, and mobile applications Comprehensive design… Read More »TSMC North America OIP Ecosystem Forum 2024

Learn How to Simulate 2D-TMD-Channel FETs with Atomistic Precision

Are 2D-TMD-channel transistors suitable candidates for the replacement of silicon ? Considering the extreme scaling down to a few atomic layers of the FET channel, only an atomistic solution looks viable. In this context, we show how the Victory Atomistic tool can answer this essential question thanks to quantum mechanics, offering valuable support for the… Read More »Learn How to Simulate 2D-TMD-Channel FETs with Atomistic Precision

VC Formal Special Interest Group

Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United States

Register for the Synopsys VC Formal Special Interest Group (SIG) event today. This event provides an opportunity for users, managers, and enthusiasts to stay connected with the latest formal verification innovations, techniques and methodologies. Industry leaders such as Amazon, Black Sesame, Microsoft, NVIDIA, Samsung, and Untether AI will share their experiences with the latest formal… Read More »VC Formal Special Interest Group

Signoff Special Interest Group

Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United States

Join us at this year’s Synopsys Signoff SIG (Special Interest Group) event. Signoff is a critical quality control checkpoint in the chip development process, but design complexity and advance process nodes are pushing the boundaries of what is expected of signoff solutions. Meeting these scaling challenges is becoming more difficult. At this year’s Synopsys Signoff… Read More »Signoff Special Interest Group

PCB West 2024

Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United States

For more than 30 years PCB West has trained designers, engineers, fabricators and, lately, assemblers on making printed circuit boards for every product or use imaginable. More than 2,000 designers, fabricators, assemblers and engineers register and more than 100 companies exhibit each year at the four-day technical conference and one-day sold-out exhibition. From high-reliability military/aerospace… Read More »PCB West 2024

Accelerating DFT verification sign-off with the Questa DFT Verification Platform

Siemens EDA 46871 Bayside Parkway, Building B, Fremont, CA, United States

Accelerating DFT verification sign-off with the Questa DFT Verification Platform This seminar will update you on technologies and techniques you can adopt to increase your DFT verification productivity today. Specifically, we will cover: ‌ Navigating the Growing Complexity of Design-for-Test and Evolving Verification Challenges Revolutionizing Test Strategies to deliver reliable products into HPC, Automotive, Aerospace,… Read More »Accelerating DFT verification sign-off with the Questa DFT Verification Platform

Cocotb 2.0: Modernize your testbenches for even more productivity

Cocotb 2.0 is the latest major version of cocotb, ironing out many quirks that have accumulated over the years. With only small changes to your testbenches, you can benefit from improved typing and less surprising corner cases. In this talk, we’ll show what’s new in cocotb 2.0, and how you can modernize your code bases… Read More »Cocotb 2.0: Modernize your testbenches for even more productivity

DVCon Europe 2024

Holiday Inn Munich - City Centre Hochstraße 3, Munich, Germany

The Design and Verification Conference in Europe (DVCon Europe) is the leading European event covering the application of languages, tools, and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques,… Read More »DVCon Europe 2024