IP
-
TSMC North America OIP Ecosystem Forum 2024
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesLearn About: Emerging advanced node design challenges and corresponding design flows and methodologies for A16, N2 and N3 processes Latest updates on TSMC 3DFabric™ chip stacking and advanced packaging processes, InFO, CoWoS®, and SoIC, 3DFabric Alliance, and 3Dblox™ standard, plus innovative 3Dblox-based design enablement technologies and solutions, targeting HPC, AI/ML, and mobile applications Comprehensive design… TSMC North America OIP Ecosystem Forum 2024
-
Memory Users Conference 2024
Advancements in memory technology are fueling rapid growth in big data applications across AI, 5G, Automotive, and HPC. These demanding applications create many challenges for memory designers. Some long-standing challenges are exacerbated, while the latest technology nodes have introduced some new ones. At Synopsys, there is a corporate-wide commitment to developing broad-based solutions that address these challenges. … Memory Users Conference 2024
-
Memory Users Conference 2024 – China, Taiwan
Advancements in memory technology are fueling rapid growth in big data applications across AI, 5G, Automotive, and HPC. These demanding applications create many challenges for memory designers. Some long-standing challenges are exacerbated, while the latest technology nodes have introduced some new ones. At Synopsys, there is a corporate-wide commitment to developing broad-based solutions that address these challenges. … Memory Users Conference 2024 – China, Taiwan
-
Redefining Mobile Experiences with AI – Session 2
The Arm platform is providing the foundation for the next wave of AI smartphones and laptops. As AI models rapidly evolve, we’re seeing that software begins to outpace hardware, requiring additional innovation at all levels of the compute stack. To meet these growing demands, the Arm platform offers a new compute solution for maximum performance… Redefining Mobile Experiences with AI – Session 2
-
AutoSens Europe 2024
Palau de Congressos Av. de la Reina Maria Cristina, Barcelona, SpainJoin us as we embark on an exciting new journey in the vibrant city of Barcelona! From 8-10 October 2024, we will unite the AutoSens community at the Palau de Congressos in Barcelona to shape the future of ADAS and AV. Expect over 60 expert speakers, engaging panels, technical case studies, and exploration of 12… AutoSens Europe 2024
-
2024 OCP Global Summit
San Jose Convention Center 150 W San Carlos Street, San Jose, CA, United StatesThe OCP Summit is the premier event uniting the most forward-thinking minds in open IT Ecosystem development. The Summit presents a unique platform for our Community from around the globe to share their insights, foster partnerships and showcase cutting-edge advancements in open hardware and software. The 2024 OCP Global Summit theme is "From Ideas to Impact". This… 2024 OCP Global Summit
-
ARM corelink, Arteris NoC, UCIe, Bunch-of-wires, CXL and PCIe- Designing the interconnect is not for the weak-hearted
There are so many options for Network-on-Chip: ARM-Corelink CMN700, Arteris FlexNoC, open-source NoC interconnect, and of course developing home-grown fully customized solutions. Where does each solution fit? Where do we use it- backplane vs inside domains? How does AMBA AXI or PCIe or CXL fit in the mix? With the advent of chiplet, do we… ARM corelink, Arteris NoC, UCIe, Bunch-of-wires, CXL and PCIe- Designing the interconnect is not for the weak-hearted
-
Static and Dynamic CDC Verification of AXI4 Stream-based IPs
The AXI4 Stream protocol is used as a standard interface to exchange data between connected IPs within FPGA designs. For crossing clock domains, the AXI4 Stream interconnect is based on switches capable of transferring data to another asynchronous clock domain. The alternative solution is a dual-port AXI4 Stream IP, capable of changing clock domains when… Static and Dynamic CDC Verification of AXI4 Stream-based IPs
-
RISC-V Summit – North America 2024
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesRISC-V is defining the future of open computing by providing unprecedented freedom to innovate. More than 13 billion RISC-V cores have shipped, powering new innovations in AI/ML, wireless, automotive. data center, space, IoT, embedded and more. Each day, thousands of engineers around the world collaborate and contribute to advance RISC-V. The RISC-V community shares the… RISC-V Summit – North America 2024
-
Navigating COTS-IP in DO-254: Strategies for Safe and Efficient FPGA Design
The integration of COTS-IP (Commercial Off-The-Shelf Intellectual Property) components in FPGA-based Avionics systems can significantly speed up development and enhance performance. However, it also introduces unique challenges, as these components may not align with the strict aviation development assurance standards required for DO-254 compliance. This webinar will guide you through the process of balancing the… Navigating COTS-IP in DO-254: Strategies for Safe and Efficient FPGA Design
-
IEEE World Technology Summit – AI INFRASTRUCTURE
San Jose Convention Center 150 W San Carlos Street, San Jose, CA, United StatesThis event features top executives from around the world who describe the burning issues surrounding AI and how to solve our immediate problems, focusing on these core areas: AI applications and their required infrastructure Silicon to support AI applications Systems to support AI applications Security and Standards AI is critical to our future. Please join… IEEE World Technology Summit – AI INFRASTRUCTURE
-
ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer
The AI revolution and other application domains, like data centers, advanced wireless communications, image and video processing, automated driving assistance, and post-quantum cryptography need more powerful architectures with higher performance. This is driving demand for heterogeneous multicore systems including application specific instruction set processors (ASIPs). ASIPs have become a mainstream implementation option for modern SoCs,… ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer