22nd IEEE Nano
Edificio Gaspar Melchor de Jovellanos Carrer Eivissa, s/n, 07120 Palma, Illes Balears, SpainThe 22nd IEEE International Conference on Nanotechnology (IEEE-NANO 2022) will be held from 4th to 8th of July, 2022, at the Campus of Balearic Islands University (UIB) in Palma, the capital of Balearic Islands, Spain. IEEE-NANO is the flagship IEEE international conference on Nanotechnology, which has been a successful annual conference since 2001. Recent conferences were held… Read More »22nd IEEE Nano
FPGA-Conference Europe
Hotel NH München Ost Conference Center Einsteinring 20, Munich, Aschheim, GermanyFPGAs have made a regular evolutional leap forward in terms of new approaches and solutions for both hardware- and software developers. The FPGA Conference Europe, organized by ELEKTRONIKPRAXIS and the FPGA training center PLC2, is addressing that progress across all major manufacturers. It focusses on user-oriented, practically applicable solutions that developers can quickly integrate into… Read More »FPGA-Conference Europe
FSiC 2022 – Free Silicon Conference
Sorbenne Université 15-21 Rue de l'École de Médecine, Paris, FranceThe 2022 Free Silicon Conference (FSiC) will take place in Paris (Sorbonne) on July 7,8,9 2022 (Thursday to Saturday). This event will build on top of the 2019 edition. The conference will connect experts and enthusiasts who want to build a complete Free and Open Source CAD ecosystem for designing analog and digital integrated circuits. The conference will… Read More »FSiC 2022 – Free Silicon Conference
Driving Low-Power Design with High-Level Synthesis
With the growth in computing at the edge driven by the explosion of battery-powered smart devices, designing for low power is mission-critical to product success. Numerous techniques, spanning all stages of design, are employed to reduce power. Since many of the low-power design techniques come at a cost in performance, the key design challenge continues… Read More »Driving Low-Power Design with High-Level Synthesis
59th DAC
Moscone Center 747 Howard Street, San Francisco, CA, United StatesThe Design Automation Conference (DAC) is the premier event devoted to the design and design automation of electronic systems and circuits. DAC focuses on the latest methodologies and technology advancements in electronic design. Get ready for 59th DAC returning to San Francisco, California this July 10-14 at the Moscone West Center. Join researchers, designers, practitioners,… Read More »59th DAC
Design Automation Conference, 2022
Moscone Center 747 Howard Street, San Francisco, CA, United StatesThe Design Automation Conference (DAC) is recognized as the premier event for the design and design automation of electronic chips to systems. DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical… Read More »Design Automation Conference, 2022
SEMICON West 2022 Hybrid
Moscone Center 747 Howard Street, San Francisco, CA, United StatesSEMICON West Is This Year's Biggest Stage For the Latest Technologies and Solutions in Semiconductor Design & Manufacturing Thousands of attendees, hundreds of exhibit booths, a full slate of technical programs covering the complete semiconductor design/manufacturing supply chain, plus the chance to network and connect in person again! No wonder there’s such a buzz around… Read More »SEMICON West 2022 Hybrid
Digital Engineering Best Practices for Aerospace & Defense
Register for this Cadence TECHTALK™ webinar, where senior director of solutions marketing Frank Schirrmeister will discuss how commercial electronics hardware companies use cutting-edge design techniques to ensure that their hardware/software designs work as intended prior to fabrication. This ensures that hardware is built right the first time, in an affordable, sustainable, and agilely modernizable fashion.… Read More »Digital Engineering Best Practices for Aerospace & Defense
Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges
PCIe, the most popular interconnect in compute, AI and storage systems, is now offering faster data rate, higher performance, lower power and lower latency than the previous generation. Because of these reasons and the addition of PAM-4 signaling, challenges such as signal integrity, power integrity, implementation, IP integration and more must be considered when designing… Read More »Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges
Rambus Design Summit 2022
Join us at Rambus Design Summit Back for its third year, the Rambus Design Summit is a virtual conference focused on the selection and implementation of chip and IP solutions for the data center, edge, automotive and IoT devices including the acceleration and security of AI/ML applications. Hear our technology leaders give their insights on… Read More »Rambus Design Summit 2022
From Cross-Platform Specification to Code Generation at the Enterprise Level
Learn how to capture your register and sequence specifications for IPs and SoCs from the individual IP to the enterprise level using IDS-NextGen™ .
AI-Driven Verification: Saving Time with Verdi Regression Debug Automation
Analyzing the thousands of failures from daily regression runs is a manual, tedious, and error-prone process. The process can significantly impact quality-of-results, time-to-results and cost-of-results. The Synopsys Verdi® Regression Debug Automation (RDA) is an artificial intelligence (AI) driven verification technology for automating the process of finding the root causes of failures in the design under… Read More »AI-Driven Verification: Saving Time with Verdi Regression Debug Automation