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Events

SISPAD 2022

University of Granada Vicente Callao, 3, Granada, Spain

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of leading-edge research and development results in the field of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano-electronic structures.… Read More »SISPAD 2022

IP-SOC China 22

The semiconductor world has to face a worldwide accelerated evolution, never seen before, both in terms of technology evolution (3D Packaging, advanced nodes) as well as new applications (IoT, Artificial Intelligence, Automotive, Security, etc) triggering an increasing demand of Semiconductor resources. D&R IP SoC Event Series is fully dedicated to IP (Silicon Intellectual property) and… Read More »IP-SOC China 22

ARC Processor Summit 2022

Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United States

Attend this free one-day event to get in-depth information from industry leaders on the latest ARC processor IP and related hardware/software technologies that enable you to achieve differentiation in your chip or system design. You will hear Synopsys experts, partners, and the ARC user community discuss electronic market trends and present on a range of… Read More »ARC Processor Summit 2022

Prototyping Atomistic Nanoscale Devices

Ultra-scaled Field-Effect Transistor (FET) technology requires simulations at the atomic scale for designing the most advanced technological architectures at 5 nm node and below. Thanks to Victory Atomistic’s combination of non-equilibrium Green’s functions (NEGF) and state-of-the-art band structure calculations, versatile, predictive, and fast simulations become accessible. To illustrate Victory Atomistic usage, we will use a… Read More »Prototyping Atomistic Nanoscale Devices

CDC Verification with Hard IP Blocks

Most FPGA designs contain configurable hard IP blocks supplied by FPGA vendors. These Hard IP blocks do not contain synthesizable RTL code, and therefore are excluded from advanced linting. In fact, this is a correct approach as hard IP blocks are assumed to be functionally stable and may be excluded from both static and dynamic… Read More »CDC Verification with Hard IP Blocks

MLCAD Workshop 2022

Snowbird 9385 S. Snowbird Center Dr., Snowbird, UT, United States

The workshop focuses on Machine Learning (ML) for all aspects of CAD and electronic system design. The workshop is sponsored by both the ACM Special Interest Group on Design Automation (SIGDA) and the IEEE Council on Electronic Design Automation (CEDA). The workshop program will have keynote and invited speakers in addition to technical presentations. MLCAD… Read More »MLCAD Workshop 2022

FPGA World 2022 – Stockholm

Afry Frösundaleden 2A, 169 70 Solna, Solna, Sweden

The FPGAworld Conference is an international forum for researchers, engineers, teachers, students, and hackers. It covers topics such as complex analog/digital/software FPGA SoC systems, FPGA/ASIC-based products, educational & industrial cases, and more. Registration for attendees is free and includes 2*coffee, lunch and go-home drink.   Keynote speaker: Magnus Peterson, Synective Labs AB, Sweden Title: FPGAs for… Read More »FPGA World 2022 – Stockholm

2022 WLI Women In Semiconductor Hardware (WISH) Conference

The annual Women in Semiconductor Hardware (WISH) Conference is GSA WLI’s flagship event bringing together industry luminaries, entrepreneurs, and university women in STEM. WISH showcases the changing face of technology and offers awards celebrating the women who have helped to break the glass ceiling and those who are following in their footsteps. In support of WISH, we… Read More »2022 WLI Women In Semiconductor Hardware (WISH) Conference

SemIsrael Tech Webinar

Stay Tuned... Advanced RISC-V processor verification and methodologies This talk will outline the latest advances in RISC-V functional verification to address the demands of high-reliability and automotive applications, including the innovations in processor designs with features such as: out-of-order pipelines, hardware multi-threading, multi-hart, custom extensions and advanced privileged modes, plus vector accelerators. Key updates will… Read More »SemIsrael Tech Webinar

Sigasi September Productivity Hacks Workshop

Sigasi Studio serves as a code browser for VHDL, Verilog and SystemVerilog. You can navigate through your project to understand large and complex legacy designs. Visuals of your code update instantly and are cross-linked to your code to allow graphical browsing. Sigasi Studio guides you through complex code designs. The instant feedback on errors and… Read More »Sigasi September Productivity Hacks Workshop

CadenceLIVE Boston 2022

Boston Marriott Burlington One Burlington Mall Road, Burlington, MA, United States

CadenceLIVE Boston 2022 is back, this time in person and will be held on September 14 at the Boston Marriott Burlington. The event features peer presentations that offer solutions for today's design challenges that will impact tomorrow's products. CadenceLIVE brings users, developers, and industry experts together to network, share ideas, and inspire design creativity. Attendees… Read More »CadenceLIVE Boston 2022

Scalable, On-Demand (by the Minute) Verification to Reach Coverage Closure

Verification has long been the most time-consuming and often resource-intensive part of chip development. Building out the infrastructure to tackle verification can be a costly endeavor, however. Emerging and even well-established semiconductor companies must weigh the Cost-of-Results (COR) against Time-to-Results (TTR) and Quality-of-Results (QOR). The Synopsys Cloud Verification Instance is the first scalable, on-demand verification… Read More »Scalable, On-Demand (by the Minute) Verification to Reach Coverage Closure