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ITC 2024
Hilton San Diego Bayfront 1 Park Blvd, San Diego, CA, United StatesInternational Test Conference, the cornerstone of TestWeek™ events, is the world’s premier conference dedicated to the electronic test of devices, boards and systems-covering the complete cycle from design verification, test,… ITC 2024
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Navigating COTS-IP in DO-254: Strategies for Safe and Efficient FPGA Design
The integration of COTS-IP (Commercial Off-The-Shelf Intellectual Property) components in FPGA-based Avionics systems can significantly speed up development and enhance performance. However, it also introduces unique challenges, as these components… Navigating COTS-IP in DO-254: Strategies for Safe and Efficient FPGA Design
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APCCAS 2024
Chang Yung-Fa Foundation No. 11, Zhongshan S. Rd., Taipei City, TaiwanThe APCCAS is a major international forum for researchers, scientists, educators, students and engineers to exchange their latest findings in circuits and systems. It covers a wide range of topics… APCCAS 2024
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IEEE World Technology Summit – AI INFRASTRUCTURE
San Jose Convention Center 150 W San Carlos Street, San Jose, CA, United StatesThis event features top executives from around the world who describe the burning issues surrounding AI and how to solve our immediate problems, focusing on these core areas: AI applications… IEEE World Technology Summit – AI INFRASTRUCTURE
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Rise Together Beyond RTL : Practical Techniques for Improving ASIC Design Efficiency and Early Verification
High-level design techniques and automation tools to address the limitations of traditional RTL, reduce verification times, improve performance, and manage growing design complexity—integrating seamlessly. What You'll Learn: This Lunch &… Rise Together Beyond RTL : Practical Techniques for Improving ASIC Design Efficiency and Early Verification
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ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer
The AI revolution and other application domains, like data centers, advanced wireless communications, image and video processing, automated driving assistance, and post-quantum cryptography need more powerful architectures with higher performance.… ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer
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Tessolve AI Strategy & Eco System for DV
With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions… Tessolve AI Strategy & Eco System for DV
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AI-Driven Constraint Generation for PCB and IC Package Design
Join our webinar to discover how AI-driven optimization and automation in constraint generation can boost productivity and shorten design cycles for PCB and IC package design. Learn how integrating Allegro… AI-Driven Constraint Generation for PCB and IC Package Design
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Optimize Systems and Semiconductor Architecture for Deep Learning Algorithms Using System-Level Modeling
In a world where artificial intelligence and machine learning are embedded in critical applications—from real-time tracking and object detection to autonomous systems—the architecture behind these innovations must be both powerful… Optimize Systems and Semiconductor Architecture for Deep Learning Algorithms Using System-Level Modeling
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Workshop on Open Source EDA Technologies (WOSET)
Virtual! No registration fee! The WOSET workshop aims to galvanize the open-source EDA movement. The workshop will bring together EDA researchers who are committed to open-source principles to share their… Workshop on Open Source EDA Technologies (WOSET)
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2024 TSMC Europe OIP Ecosystem Forum
Hilton Amsterdam Airport Schiphol Schiphol Boulevard 701 Amsterdam, Amsterdam, NetherlandsLearn About: Emerging advanced node design challenges and corresponding design flows and methodologies for A16, N2 and N3 processes Latest updates on TSMC 3DFabric™ chip stacking and advanced packaging processes,… 2024 TSMC Europe OIP Ecosystem Forum
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Ansys-Synopsys Technology Update: The Latest Advances in Multi-Die Design
The semiconductor industry is rapidly adopting 2.5D and 3D multi-die designs as the significant benefits have become clear for applications like HPC, GPU, mobile, and AI/ML. Multi-die design technology has… Ansys-Synopsys Technology Update: The Latest Advances in Multi-Die Design
12 events found.