- 
	  Shorten Your CDC Debug Cycle by 10X with ML-based RCAOver the last few decades System on Chip (SoC) design size has dramatically increased, and more complexity has been introduced to deliver the desired functionality. Growing design sizes lead to the introduction of several asynchronous clocks which can result in the reporting of millions of clock domain crossings (CDC) at the IP/SoC level. This leads… Shorten Your CDC Debug Cycle by 10X with ML-based RCA 
- 
	  ISQED 2023Seven Hills Conference Center 800 Font Blvd, San Francisco, CA, United StatesThe 24th International Symposium on Quality Electronic Design (ISQED'23) is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology,packaging, assembly & test to achieve total design quality. ISQED 2023 will held with the technical sponsorship of IEEE CASS, IEEE EDS, and in-cooperation with ACM/SigDA. Conference… ISQED 2023 
- 
	  Choosing the best modeling abstraction for your analysisThis webinar cover the modeling abstraction in the design of electronics, semiconductors and software. This webinar will definitely improve your modeling skills! --Is the abstraction right for your application and design goal? --How do you accelerate the simulation using abstraction? --Can you change the model of computation using abstraction to simplify the modeling effort? During… Choosing the best modeling abstraction for your analysis 
- 
	  Enhance Productivity with Machine Learning in the Analog Front-End Design FlowAdvanced semiconductor nanometer technology nodes, together with smart IC design applications enable today very complex and powerful systems for communication, automotive, data transmission, AI, IoT, medical, industry, energy harvesting, and many more. However, more aggressive time-to-market and higher performance requirements force IC designers to look for advanced and seamless design flows, tools & methodologies to… Enhance Productivity with Machine Learning in the Analog Front-End Design Flow 
- 
	  User2User North AmericaSanta Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United StatesU2U is your opportunity to learn, grow and connect with fellow technical experts who design leading-edge products using Siemens EDA tools. U2U is focused on these areas: Analog/Mixed-Signal Verification Calibre Design Solutions & Power Integrity Analysis Digital IC Implementation Functional Design & Verification Hardware-Assisted Verification High-Level Synthesis/Verification & RTL Power Estimation/Optimization Next Gen Packaging and… User2User North America 
- 
	  Analog Layout with Thomas Parry and Tim EdwardsIn this webinar we will take the comparator circuit from last time and look at how to do the layout with the 2 most used open source layout tools. We will send the link to the webinar recording to those who registered. We will cover: Creation of the transistors Layout with Magic Layout with Klayout… Analog Layout with Thomas Parry and Tim Edwards 
- 
	  The Power of Verilog’s PLI and VPI for FPGA DesignsA logic simulator’s programming interfaces can be used for not only verifying logic IP but also the co-development of logic and embedded software. Our ‘Introducing Logic Simulator Programming Interfaces for FPGA designs’ three-part webinar series starts on April 13. Our guest presenter for this series is Simon Southwell, from Anita Simulators, and the schedule is… The Power of Verilog’s PLI and VPI for FPGA Designs 
- 
	  ASIC Design Using OpenROADUCSC Silicon Valley Extension 3175 Bowers Ave, Santa Clara, CA, United StatesJoin us for a free, half-day workshop on the key concepts of an ASIC design physical implementation flow using OpenROAD. OpenROAD delivers a fast, barrier-free, and low-cost RTL-to-GDS, no-human-in-loop flow for design above 12nm and is one of the tools students can work with in UCSC Silicon Valley Extension VLSI Engineering program courses Knowing how to use open EDA tools boosts… ASIC Design Using OpenROAD 
- 
	  DATE 2023Flanders Meeting & Convention Center Antwerp Antwerp, BelgiumThe DATE conference is the main European event bringing together designers and design automation users, researchers and vendors as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. DATE puts a strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware and embedded systems as well… DATE 2023 
- 
	  Hannover Messe 2023Hannover Expo-Plaza Hannover, GermanyExhibitors & Products Conference Program Networking AI & Machine Learning Carbon-neutral production Energy Management Hydrogen & Fuel Cells Industry 4.0 
- 
	  3rd Workshop on Open-Source Design AutomationFlanders Meeting & Convention Center Antwerp Antwerp, BelgiumCall for papers There is no doubt that proprietary EDA tools are successful, mature, and fundamental for hardware development. However, the “walled garden” approach created by closed-source tool flows can hamper novel FPGA/ASIC-based applications and EDA innovation alike by requiring that researchers either operate within the limits of what has already been imagined, or require… 3rd Workshop on Open-Source Design Automation 
- 
	  CS International ConferenceSheraton Brussels Airport Hotel Brussels, Belgiumhe 13th CS International conference builds on the strengths of its predecessors, with around 40 leaders from industry and academia delivering presentations that fall within five key themes: Ultrafast Communication; Making Headway with the MicroLED; Taking the Power from Silicon, New Vectors for the VCSEL, and Ultra-wide Bandgap Devices. Delegates attending these sessions will gain… CS International Conference 
	
		12 events found.