-
Accelerating Electric Vehicle Development: Integrated design flow for power modules with functional safety and reliability focus
This webinar to delve into the integrated design flow for power modules for electric vehicles (EVs) for enhanced functional safety and reliability. The power modules are distinguished by their high voltage and current requirements, substantial power dissipation, and the resulting temperature rise. Ensuring their safety and reliability is paramount. We will explore how Cadence’s cutting-edge… Accelerating Electric Vehicle Development: Integrated design flow for power modules with functional safety and reliability focus
-
FPGA Front Runner: FPGA Safety and Security
The Cass Centre Shaftesbury Road, Cambridge, United KingdomThis event covers the challenges in ensuring an FPGA is secure and demonstrably safe as per the relevant industry safety standards. This includes supply chains, FPGA hardware and the IP used on the FPGA Agenda (GMT) Time Speaker Details 09.30 Arrival and registration 10.00 Tobias Adryan, Synopsys Securing FPGAs Beyond the Bitstream 10.30 Espen Tallaksen,… FPGA Front Runner: FPGA Safety and Security
-
DVClub Europe – AI/ML in Verification
This DVClub will consider how we can save time and effort whilst improving time-to-market through the application of AI/ML to design verification. Agenda (GMT): Time Session Description Slides Videos 12.00 GMT Welcome and Introduction – Mike Bartley, Tessolve Mike Bartley,Tessolve 12.00 GMT Hardik Raina, Agnisys, Inc - Genetic Algorithms for Automated Verification from VCD Data. 12.20… DVClub Europe – AI/ML in Verification
-
Webinar 3: Tessolve AI assisted advanced DV Flow and Use cases
Webinar 3: Tessolve AI assisted advanced DV Flow and Use cases With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions in both effort and costs, and with many clients to improve both efficiency and quality… Webinar 3: Tessolve AI assisted advanced DV Flow and Use cases
-
Keysight EDA 2025 Launch event
New EDA Tools for 5G and AI Infrastructure Design We are ready to share the latest release of our electronic design automation (EDA) software suites. This update will help you design smarter with faster multidomain insights and workflows enhanced by artificial intelligence (AI). Get the Roadmap The webinar will kick off with an overview of… Keysight EDA 2025 Launch event
-
Optimizing Hardware Design with SystemRDL: Tools, Techniques, and Tips
Efficient management of registers and memory maps is critical for the success of modern System-on-Chip (SoC) designs. System Register Description Language (SystemRDL), combined with Agnisys’s IDesignSpec Suite, provides an advanced solution to automate and simplify these complex processes. In this webinar, "Optimizing Hardware Design with SystemRDL: Tools, Techniques, and Tips," we will demonstrate how the… Optimizing Hardware Design with SystemRDL: Tools, Techniques, and Tips
-
70th Annual IEEE International Electron Devices Meeting – IEDM 2024
Hilton San Francisco Union Square 333 O'Farrell Street, San Francisco, United StatesIEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. IEDM is the flagship conference for nanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices, novel quantum and nano-scale devices and phenomenology, optoelectronics, devices for… 70th Annual IEEE International Electron Devices Meeting – IEDM 2024
-
IP-SoC Conference 2024, Europe
Hotel Europole 29 rue Pierre-Sémard, Grenoble, FranceA worldwide connected Event !! IP-SoC 2024 will be the 27th edition of the working conference fully dedicated to IP (Silicon Intellectual Property) and IP based electronic systems. The event is the annual opportunity for IP providers and IP consumers to share information about technology trends, innovative IP SoC products, Breaking IP/SoC News, Market evolution and… IP-SoC Conference 2024, Europe
-
Synopsys TCAD Winter Reception
Hotel Nikko 222 Mason Street, San Francisco, CA, United StatesJoin us in person at the Synopsys TCAD Winter Reception on December 10, 2024. You have a chance to meet with our executives and product experts to learn about the latest insights on how Synopsys TCAD products can unleash the power of smart technology modeling - from atoms to circuits. Sign up and learn about… Synopsys TCAD Winter Reception
-
ICCAD-Expo 2024
Shanghai International Convention Center No. 2727, Riverside Avenue, Shanghai, ChinaThe China Integrated Circuit Design Industry Exhibition (ICCAD-Expo) has always played an important role in promoting industrial agglomeration, connecting industrial resources, and mastering industry trends.
-
17th International MOS-AK Workshop, Silicon Valley
Modeling of Systems and Parameter Extraction Working Group T_0 MOS-AK Welcome and Opening Long Ma and Wladek Grabinski Keysight Technologies (US) and MOS-AK (EU) T_1 What's New in Keysight Device Modeling 2025 Long Ma Keysight Technologies (US) T_2 Si2 Compact Model Coalition 2024 Updates Peter M. Lee CMC Chairman (US) T_3 OpenVAF - status update,… 17th International MOS-AK Workshop, Silicon Valley
-
Mastering EMC Simulations for Electronic Designs
Electromagnetic Compatibility (EMC) simulation ensures that electronic devices comply with regulatory standards and perform optimally in their intended environments. As the complexity of electronic systems increases, the importance of EMC simulation grows, allowing engineers to predict and mitigate potential electromagnetic interference (EMI) issues before physical prototypes are built. Overview It can be challenging for EMC… Mastering EMC Simulations for Electronic Designs
12 events found.