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DesignCon 2024
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesThe Must Attend Event for Chip, Board, and Systems Design Engineers DesignCon is the premier high-speed communications and system design conference and exposition, offering industry-critical engineering education in the heart… DesignCon 2024
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Signal & Power Integrity Special Interest Group
Hilton Santa Clara 4949 Great America Parkway, Santa Clara, CA, United StatesDear SIPI Engineer, As a member of the engineering community, you are invited to attend Synopsys Signal & Power Integrity Special Interest Group event taking place at Hilton Santa Clara.… Signal & Power Integrity Special Interest Group
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Chiplet Summit
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesThe Second Annual Chiplet Summit is the show chip designers can’t miss if they want to stay competitive. They’ll get the scoop on ways to make their chiplets run faster,… Chiplet Summit
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Canada’s Semiconductor Summit
Brookstreet Hotel 525 Leggett Drive, Ottawa, CanadaHelp build Canada's role in North America's integrated semiconductor supply chain. Featuring key industry and government decision-makers from Canada, the United States, and international jurisdictions, your insights at this by-invitation-only… Canada’s Semiconductor Summit
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Functional Verification workflow for Trusted and Assured Microelectronics
In a world of increasing trust and assurance challenges for microelectronic devices, emerging industry standards and defense policy demand early and advanced functional verification methods before ICs may be deployed in… Functional Verification workflow for Trusted and Assured Microelectronics
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DVClub Europe: Verifying Safety in Automotive
Hardware designs intended for the automotive domain need to implement safety mechanisms to minimize the risk of accidents and injuries caused by hardware-related issues in vehicles. In this DVClub we… DVClub Europe: Verifying Safety in Automotive
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Design Exploration of RF GaN Amplifier, 3D Packaging, and Thermal Analysis
Join us for this webinar on RF GaN amplifier design using electromagnetic/thermal 3D solvers. We will discuss the step-by-step process of building a GaN amplifier, beginning with the transistor model… Design Exploration of RF GaN Amplifier, 3D Packaging, and Thermal Analysis
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CadenceCONNECT – Photonics Event
Cadence Design Systems, Bldg 10 2655 Seeley Avenue, San Jose, CA, United StatesJoin Cadence in person for the 8th annual CadenceCONNECT Photonics event and workshop on February 7 – 8, 2024, to discuss the increasingly important role of photonics in enabling AI… CadenceCONNECT – Photonics Event
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Power Devices SPICE Modeling for Si, GaN and SiC Technologies
We start by examining the different technologies used in the manufacturing of power devices, including Si, GaN, and SiC, considering their respective particularities and advantages. We will then analyze various… Power Devices SPICE Modeling for Si, GaN and SiC Technologies
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Seamless SI/PI Signoff of Allegro PCB Designs Driven by In-Design Analysis
Signal and power integrity (SI/PI) are top priorities for engineers designing today’s high-speed, high-density PCBs. Easy-to-use in-design analysis directly integrated into the Allegro PCB design environment uncovers SI/PI issues early… Seamless SI/PI Signoff of Allegro PCB Designs Driven by In-Design Analysis
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Power Innovations in Consumer Electronics Using LF EM Solutions
This webinar will cover how the Ansys simulation tools are now widely used in many low-frequency (LF) EM applications, such as wireless charging, power supplies, transformers, magnetic latches and actuators,… Power Innovations in Consumer Electronics Using LF EM Solutions
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Introducing Ansys AI: A New Chapter in Engineering Simulation
Join us to learn more about the AI and Simulation Revolution in this upcoming webinar. We're revolutionizing engineering simulation with the power of Artificial Intelligence with SimAI, AnsysGPT, and Ansys… Introducing Ansys AI: A New Chapter in Engineering Simulation
12 events found.