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Methodics User Group – November
Join our monthly session with Methodics IPLM experts and other users for open discussion, Q&A, and product demos. Next Session: November 9 | 1:00 P.M. EST Each 45-minute session offers a new opportunity to: Learn/share best practices. Interact with and learn from other users. Have Q&A time with our product experts on usage and methodology.… Methodics User Group – November
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Workforce Shortages—Meeting Challenges for the Semiconductor Industry
As demand for semiconductors is increasing, foundries and other makers of chips are expanding their manufacturing capacities. With new fabs bringing thousands of new jobs to the US, Texas is ready to secure many of those positions. Where will we find the talent to fill the upcoming surge of engineering and technical personnel needed to support our… Workforce Shortages—Meeting Challenges for the Semiconductor Industry
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Jasper User Group 2021
It’s time for our annual formal verification user group CadenceCONNECT: Jasper User Group 2021. This in-depth technical conference connects designers, verification engineers, and engineering managers from around the world to share the latest design and verification practices based on Cadence® JasperGold® formal verification technologies and methodologies. This user group has become the premier industry event for formal experts… Jasper User Group 2021
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Virtual Prototyping Day – Silver: Accelerate Your Innovation with Virtual ECUs
Synopsys invites you to the Virtual Prototyping Day – Silver, a virtual event on virtual ECUs and applications in automotive software development. Users share their experiences with the latest techniques and methodologies using Synopsys Silver virtual ECUs. Attendees will learn about how Silver supports new trends and industry standards in automotive with presentations by Daimler,… Virtual Prototyping Day – Silver: Accelerate Your Innovation with Virtual ECUs
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Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed-Signal Designs
Analog designers appreciate the importance of tight communication between layout and design teams, yet with geographically dispersed teams this can be a big challenge. Close collaboration between circuit designer and layout designer is essential for creating high-quality analog layouts. With this close connection and sharing feedback in a consistent way, analog designers can be sure… Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed-Signal Designs
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The Evolution of Process TCAD in Semiconductor R&D and Manufacturing
Shela Aboud, Ph.D., Synopsys Today, nearly every aspect of an integrated circuit is designed using EDA software. Technology computer aided design (TCAD) tools are used for modeling front-end-of-line manufacturing, including the fabrication and electrical characterization of individual transistors. I will discuss how TCAD has evolved to keep up with technology evolution and how new drivers… The Evolution of Process TCAD in Semiconductor R&D and Manufacturing
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What’s Needed to Perform End-to-End Testing for 5G Open Radio Access Network SoCs
Testing an O-RAN Radio Unit (O-RU) SoC at full scale implies sending realistic traffic, in conformance with current specifications and at the right time on the right interfaces to simulate complex scenarios and cover as many corner cases as possible. It requires a robust debug methodology which can provide quick turn around and appropriate window… What’s Needed to Perform End-to-End Testing for 5G Open Radio Access Network SoCs
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3DIC 2021
North Carolina State University 1101 Garman St., Raleight, NC, United StatesIEEE International 3D System Integration Conference (3DIC) November 15-18, 2021 Raleigh, North Carolina, USA After a one-year hiatus, 3DIC will once again unite 2.5D/3D researchers and developers from all around the world. This year’s conference employs a hybrid format of in-person events and virtual events. Talks, panels, exhibits, papers, and discussions will foster a stimulating… 3DIC 2021
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Practical Flows for Continuous Integration: Making The Most of Your EDA Tools
Verifying changes to RTL and testbench code prior to releasing to the rest of your team is the best way to avoid committing bugs that cause massive, team-wide disruptions. This webinar takes you through example tool flows that, when used within a Continuous Integration (CI) system, can avoid or even eliminate those bugs and disruptions.… Practical Flows for Continuous Integration: Making The Most of Your EDA Tools
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Accelerating Analog Layout
The growing demand for analog features on IoT devices means that analog designers are under constant pressure to complete more designs faster than ever. For most layout designers, analog layout remains a largely manual task, which creates real challenges for today’s pressured designers. Pulsic presents a new solution for analog layout automation. Animate Preview accelerates… Accelerating Analog Layout
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GSA – Asia Pacific Executive Forum
We invite you to join us at the 2021 Asia Pacific Executive Forum, happening virtually on Tuesday, November 16 at 9:00 AM HKT. In adapting to the challenges of COVID, the world has experienced dramatic changes that are redefining our daily lives. New capabilities empowered by AI, IoT, hyperscale computing and 5G are driving digital… GSA – Asia Pacific Executive Forum
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RISC-V Days Tokyo Autumn 2021
RISC-V Days Tokyo is Japan’s largest RISC-V event. We will hold live and online presentations, live exhibition booths, and press conferences. RISC-V Days Tokyo brings together excellent RISC-V-related technologies and products, as well as key persons and engineers, and provides business opportunities such as raising product awareness, realizing collaboration between companies, technology exchange, and information… RISC-V Days Tokyo Autumn 2021
12 events found.