• How to Overcome the Pain Points of AI/ML Hardware Design

    Join Achronix for a live Webinar December 16th: 10-11 AM Pacific and Recorded On-Demand After the Event AI/ML hardware faces three common pain points: memory bandwidth, computational throughput and on-chip data movement. Next-generation FPGA technology includes a 2D network on chip, GDDR6 memory interfaces and high performance machine learning processors, which present new capabilities to… How to Overcome the Pain Points of AI/ML Hardware Design

  • Club Formal India

    Summary: Cadence is pleased to once again bring you Club Formal, a platform for formal verification experts to come together and discuss the latest in formal technologies, including challenges, benefits, and best practices. Hear from your peers on how they are using formal verification techniques in their flows and interact with members of the Cadence® R&D… Club Formal India

  • ICCAD China

    Wuxi Taihu International Expo Center Wuxi, China

    The CSIA-ICCAD 2021 Annual Conference & Wuxi IC Industry Innovation and Development Summit will be held at Wuxi Taihu International Expo Center on DECEMBER 22-23, 2021. ICCAD conference will discuss the opportunities and challenges faced by the IC industry, especially the IC design industry, and enhance the innovation capability and the integration capability of China’s… ICCAD China

  • SEMICON Taiwan

    Semiconductor leaders and visionaries will convene at SEMICON Taiwan, the region’s premier gathering of the entire electronics manufacturing and design supply chain. Hear about cutting-edge advancements in heterogenous integration, green manufacturing, smart manufacturing, advanced testing, strategic materials, and MEMS and Sensors.

  • IEEE Rising Stars Conference

    Tropicana Las Vegas 3801 S Las Vegas Blvd, Las Vegas, NV, United States

    Where Students and Young Professionals Come to Connect and be Inspired As a premier event, IEEE Rising Stars Global is designed to inform, excite, enthuse, and enlighten the top engineering young professionals and students. The conference brings together the most promising students and young professionals around the world to network and is inspired by each other. The program… IEEE Rising Stars Conference

  • CES 2022

    Las Vegas Covention and World Trade Center 3150 Paradise Rd, Las Vegas, NV, United States

    CES is right around the corner, and the excitement is building! Over 1900 exhibiting companies – with more being added every day – and hundreds of thought leaders from around the world are ready to show you how tech has never been more important in our lives. Key industry audiences are also showing strong commitment: 195 of the Fortune Global… CES 2022

  • Methodics User Group

    Join us for a special extended user group in January - coffee on us! January 11 | 1:00 P.M. EST (USA only) In this 90-minute session, you will: Get key insights from our State of Semiconductor report. Engage with our experts and other attendees to discuss the trends and future of the semiconductor industry. See… Methodics User Group

  • 27th Asia and South Pacific Design Automation Conference

    In light of the continued COVID-19 pandemic situation, the ASP-DAC 2022 will be held as a virtual conference. Technical Program The technical program has been announced. Please click here for more detail. Upload Presentation Files The presentation guide has been announced. All upload links are available. Please click here for more detail. Registration The registration site is open. Please click here for the… 27th Asia and South Pacific Design Automation Conference

  • Improving Design Power and Performance with RTL Architect

    Exploring the impact of RTL on implementation PPA has traditionally been very difficult since it was hard to connect the results to the source code.  The first difficulty occurs during elaboration and synthesis. The RTL is converted to gates and the references to the source code are lost.  The second difficulty is the gate-centric, implementation, PPA reports.… Improving Design Power and Performance with RTL Architect

  • A Faster Path to Analog IC Layout

    Hey analog layout engineer! Start your journey in 2022 the right way, book a place in this webinar. In 'A faster path to analog layout' Mark Waller will show you how to shrink your design time by 60%. You are just one (free) click away: https://pulsic.link/WEBNRTwitter

  • Accelerating Complex SoCs Prototyping with Protium X2

    This CadenceTECHTALK will offer an overview of the Protium™ Enterprise Prototyping Platform for fast hardware and software verification. We will review the traditional prototyping challenges of complex SoCs using a 5G AI-enabled mobile SoC case study—RTL changes required for clocks management, memories, interfaces, multi-FPGA partitioning, and multi-user support. Join our CadenceTECHTALK to learn how the… Accelerating Complex SoCs Prototyping with Protium X2

  • Increase your productivity with Continuous Integration flows

    Abstract: In a team environment, verification engineers push code changes every day, and sometimes several times a day, to a shared repository. Each change has the potential to introduce new bugs into the design. Accordingly, when many changes are being made, it is difficult to pinpoint which one introduced new bugs, and much time can… Increase your productivity with Continuous Integration flows