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Marketing EDA

Freelance EDA Consultant
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    • Marketing EDA
    • SemiWiki.com
    • ChipDesignMag.com
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    • DAC 2025
    • DAC 2024
    • DAC 2023
    • DAC 2022
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12 events found.

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  • November 2024

  • Wed 13
    Tessolve, November 13, 2024
    November 13, 2024 @ 3:00 pm - 3:30 pm GMT

    Tessolve AI Strategy & Eco System for DV

    With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions in both effort and costs, and with many clients to improve both efficiency and quality in DV through AI. In this series of 3 short… Tessolve AI Strategy & Eco System for DV

  • Thu 14
    Cadence, November 14, 2024
    November 14, 2024 @ 10:00 am - 11:00 am PST

    AI-Driven Constraint Generation for PCB and IC Package Design

    Join our webinar to discover how AI-driven optimization and automation in constraint generation can boost productivity and shorten design cycles for PCB and IC package design. Learn how integrating Allegro X and Sigrity X can streamline your workflow. Key Takeaways: Learn how the Sigrity Topology Workbench, a robust system-level SI/PI environment for what-if and pre-route… AI-Driven Constraint Generation for PCB and IC Package Design

  • Thu 14
    Mirabilis, November 14, 2024
    November 14, 2024 @ 10:00 am - 11:00 am PST

    Optimize Systems and Semiconductor Architecture for Deep Learning Algorithms Using System-Level Modeling

    In a world where artificial intelligence and machine learning are embedded in critical applications—from real-time tracking and object detection to autonomous systems—the architecture behind these innovations must be both powerful and efficient. To help engineers and architects address these challenges, our upcoming webinar will demonstrate how System-Level Modeling can be a game-changer in optimizing the performance and… Optimize Systems and Semiconductor Architecture for Deep Learning Algorithms Using System-Level Modeling

  • Mon 18
    WOSET 2024
    November 18, 2024 @ 8:00 am - 5:00 pm PST

    Workshop on Open Source EDA Technologies (WOSET)

    Virtual! No registration fee! The WOSET workshop aims to galvanize the open-source EDA movement. The workshop will bring together EDA researchers who are committed to open-source principles to share their experiences and coordinate efforts towards developing a reliable, fully open-source EDA flow. The workshop will feature presentations and posters that overview existing or under-development open-source… Workshop on Open Source EDA Technologies (WOSET)

  • Tue 19
    TSMC, November 19, 2024
    November 19, 2024 @ 8:00 am - 5:00 pm CET

    2024 TSMC Europe OIP Ecosystem Forum

    Hilton Amsterdam Airport Schiphol Schiphol Boulevard 701 Amsterdam, Amsterdam, Netherlands

    Learn About: Emerging advanced node design challenges and corresponding design flows and methodologies for A16, N2 and N3 processes Latest updates on TSMC 3DFabric™ chip stacking and advanced packaging processes, InFO, CoWoS®, and SoIC, 3DFabric Alliance, and 3Dblox™ standard, plus innovative 3Dblox-based design enablement technologies and solutions, targeting HPC, AI/ML, and mobile applications Comprehensive design… 2024 TSMC Europe OIP Ecosystem Forum

  • Tue 19
    Ansys-Synopsys, November 19, 2024
    November 19, 2024 @ 9:00 am - 10:00 am PST

    Ansys-Synopsys Technology Update: The Latest Advances in Multi-Die Design

    The semiconductor industry is rapidly adopting 2.5D and 3D multi-die designs as the significant benefits have become clear for applications like HPC, GPU, mobile, and AI/ML. Multi-die design technology has been quickly evolving with early experiences leading to the development of more advanced implementation and analysis techniques. For the past years, Synopsys and Ansys have… Ansys-Synopsys Technology Update: The Latest Advances in Multi-Die Design

  • Wed 20
    Cadence, November 20, 2024
    November 20, 2024 @ 7:00 am - 9:00 am PST

    Fast Track RTL Debug with the Verisium Debug Python App Store

    Working with debugging scripts locally and manually can be challenging, as can reusing and organizing them. What if there was a way to create your own app with the required functionality and to register it with the tool? The answer lies in the Verisium Debug Python App Store. Instantly add additional features and capabilities to… Fast Track RTL Debug with the Verisium Debug Python App Store

  • Wed 20
    Ansys, November 20, 2024
    November 20, 2024 @ 9:00 am - 5:00 pm UTC+5.5

    Ansys IDEAS User Conference India 2024

    Join us for the Ansys IDEAS India User Conference 2024 — a place to catch up on industry best practices and the latest Semiconductor design advances. IDEAS will explore future trends with keynotes from industry leaders and offer technical insights from expert chip designers from many of the world’s top semiconductor companies. Overview At this… Ansys IDEAS User Conference India 2024

  • Wed 20
    Tower, November 20, 2024
    November 20, 2024 @ 9:00 am - 6:00 pm PST

    Tower Semiconductor – Technical Global Symposium 2024

    Hyatt Regency Santa Clara 5101 Great America Parkway, Santa Clara, CA, United States

    TGS offers a wonderful opportunity for networking, learning, and sharing the latest technology developments with our community, as well as meeting with Tower’s executives and team of experts. We invite you to join us! Time Session Speaker 9:00 – 10:00 Registration 10:00 – 10:05 Opening Mr. Lei Qin, SVP of Worldwide Sales 10:05 – 10:40… Tower Semiconductor – Technical Global Symposium 2024

  • Wed 20
    Tessolve, November 20, 2024
    November 20, 2024 @ 3:00 pm - 3:30 pm GMT

    Webinar 2: Tessolve AI assisted DV Flow

    With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions in both effort and costs, and with many clients to improve both efficiency and quality in DV through AI. In this series of 3 short… Webinar 2: Tessolve AI assisted DV Flow

  • Thu 21
    Siemens, November 21, 2024
    November 21, 2024 @ 8:00 am - 9:00 am PST

    Boost your verification productivity with Questa Verification IQ

    This session will explore Questa Verification IQ (VIQ), Siemens EDA’s next-generation collaborative and data-driven verification solution. VIQ revolutionizes the verification process by providing advanced analytics, enhanced collaboration, and comprehensive traceability. By leveraging machine learning, VIQ significantly enhances verification efficiency to boost your productivity. What you will learn: ‌How to implement a collaborative, plan-driven verification process,… Boost your verification productivity with Questa Verification IQ

  • Thu 21
    Cadence, November 21, 2024
    November 21, 2024 @ 8:00 am - 9:00 am PST

    Accelerating Electric Vehicle Development: Integrated design flow for power modules with functional safety and reliability focus

    This webinar to delve into the integrated design flow for power modules for electric vehicles (EVs) for enhanced functional safety and reliability. The power modules are distinguished by their high voltage and current requirements, substantial power dissipation, and the resulting temperature rise. Ensuring their safety and reliability is paramount. We will explore how Cadence’s cutting-edge… Accelerating Electric Vehicle Development: Integrated design flow for power modules with functional safety and reliability focus

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Daniel Payne Follow 9,346 1,920

Daniel_J_Payne
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
28 Nov 1994512627268292749

Just added SpiceGenTcl to our list of open source #SemiEDA tools at #SemiWiki, it lets you control Ngspice and Xyce using Tcl. https://semiwiki.com/wikis/industry-wikis/eda-open-source-tools-wiki/

Image for the Tweet beginning: Just added SpiceGenTcl to our Twitter feed image.
Reply on Twitter 1994512627268292749 Retweet on Twitter 1994512627268292749 0 Like on Twitter 1994512627268292749 0 Twitter 1994512627268292749
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
17 Nov 1990515272583966937

Boosting SoC design productivity with IP-XACT, a #SemiEDA and #SemiIP blog at #SemiWiki with input from Accellera. https://semiwiki.com/semiconductor-services/363741-boosting-soc-design-productivity-with-ip-xact/

Image for the Tweet beginning: Boosting SoC design productivity with Twitter feed image.
Reply on Twitter 1990515272583966937 Retweet on Twitter 1990515272583966937 0 Like on Twitter 1990515272583966937 0 Twitter 1990515272583966937
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
14 Nov 1989396186139345038

Arm acquires DreamBig Semiconductor for $265M, adding networking IP to their #SemiIP business. See all #SemiEDA and IP deals on #SemiWiki. https://semiwiki.com/wikis/industry-wikis/eda-mergers-and-acquisitions-wiki/

Image for the Tweet beginning: Arm acquires DreamBig Semiconductor for Twitter feed image.
Reply on Twitter 1989396186139345038 Retweet on Twitter 1989396186139345038 0 Like on Twitter 1989396186139345038 0 Twitter 1989396186139345038
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
10 Nov 1987953597225857089

Cadence buys ChipStack, adding to their Agentic AI tool flow. Read all #SemiIP and #SemiEDA deals on #SemiWiki, https://semiwiki.com/wikis/industry-wikis/eda-mergers-and-acquisitions-wiki/

Image for the Tweet beginning: Cadence buys ChipStack, adding to Twitter feed image.
Reply on Twitter 1987953597225857089 Retweet on Twitter 1987953597225857089 0 Like on Twitter 1987953597225857089 0 Twitter 1987953597225857089
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Address:

10440 SW Kellogg Drive
Tualatin, OR 97062

SemiWiki Blogs

© 2025 Marketing EDA | All Rights Reserved

Site by Tualatin Web

Daniel Payne Follow 9,346 1,920

Daniel_J_Payne
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
28 Nov 1994512627268292749

Just added SpiceGenTcl to our list of open source #SemiEDA tools at #SemiWiki, it lets you control Ngspice and Xyce using Tcl. https://semiwiki.com/wikis/industry-wikis/eda-open-source-tools-wiki/

Image for the Tweet beginning: Just added SpiceGenTcl to our Twitter feed image.
Reply on Twitter 1994512627268292749 Retweet on Twitter 1994512627268292749 0 Like on Twitter 1994512627268292749 0 Twitter 1994512627268292749
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
17 Nov 1990515272583966937

Boosting SoC design productivity with IP-XACT, a #SemiEDA and #SemiIP blog at #SemiWiki with input from Accellera. https://semiwiki.com/semiconductor-services/363741-boosting-soc-design-productivity-with-ip-xact/

Image for the Tweet beginning: Boosting SoC design productivity with Twitter feed image.
Reply on Twitter 1990515272583966937 Retweet on Twitter 1990515272583966937 0 Like on Twitter 1990515272583966937 0 Twitter 1990515272583966937
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
14 Nov 1989396186139345038

Arm acquires DreamBig Semiconductor for $265M, adding networking IP to their #SemiIP business. See all #SemiEDA and IP deals on #SemiWiki. https://semiwiki.com/wikis/industry-wikis/eda-mergers-and-acquisitions-wiki/

Image for the Tweet beginning: Arm acquires DreamBig Semiconductor for Twitter feed image.
Reply on Twitter 1989396186139345038 Retweet on Twitter 1989396186139345038 0 Like on Twitter 1989396186139345038 0 Twitter 1989396186139345038
Daniel_J_Payne avatar Daniel Payne @Daniel_J_Payne ·
10 Nov 1987953597225857089

Cadence buys ChipStack, adding to their Agentic AI tool flow. Read all #SemiIP and #SemiEDA deals on #SemiWiki, https://semiwiki.com/wikis/industry-wikis/eda-mergers-and-acquisitions-wiki/

Image for the Tweet beginning: Cadence buys ChipStack, adding to Twitter feed image.
Reply on Twitter 1987953597225857089 Retweet on Twitter 1987953597225857089 0 Like on Twitter 1987953597225857089 0 Twitter 1987953597225857089
Load More

Address:

10440 SW Kellogg Drive
Tualatin, OR 97062

SemiWiki Blogs

© 2025 Marketing EDA | All Rights Reserved

Site by Tualatin Web