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Maximizing the Benefits of Virtuoso Layout Suite XL

Find out how the Virtuoso Layout Suite XL you’ve known for many years is setting new standards in custom layout authoring. The connectivity-driven paradigm keeps the layout in synch with the circuit design and ensures that the design intents are always honored. Learn how we strengthened the layout editor in Virtuoso Studio, launched in 2023,… Read More »Maximizing the Benefits of Virtuoso Layout Suite XL

Hierarchical Analysis of EM Crosstalk with EMX Planar 3D Solver

Identifying sources of electromagnetic (EM) coupling and safeguarding today’s complex electronic designs from EM crosstalk are daunting tasks. For designs with multiple levels of hierarchy, identification, and detailed analysis of the “EM-sensitive” content is a challenge. The manual creation of wrapper cells or new layout views to enable this quickly becomes a time-consuming and error-prone… Read More »Hierarchical Analysis of EM Crosstalk with EMX Planar 3D Solver

DVClub Europe: Latest VHDL Verification Techniques

This DVClub focuses on the latest verification techniques in VHDL including UVVM and OSVVM Agenda (GMT) 13:00   Welcome and Introduction – Mike Bartley, Tessolve 13:00   Epsen Tallaksen, EmLogic - Get the right FPGA quality through efficient Specification Coverage (aka Requirement Coverage) 13:30   Jim Lewis, SynthWorks - OSVVM in a NutShell, VHDL’s #1 Verification Methodology 14:00    Close Additional… Read More »DVClub Europe: Latest VHDL Verification Techniques

Virtuoso – Finding Hidden Treasures to Accelerate Routing Your Layout

Every layout designer frets over routing all the interconnects DRC clean and correct as per the circuit designer’s expectations. On the one hand, you want a magic wand that just hooks up all the connections with perfect smartness. On the other hand, you need to guide the connections carefully while weaving your own creative magic… Read More »Virtuoso – Finding Hidden Treasures to Accelerate Routing Your Layout

Cadence Managed Cloud for Cost Efficient and Productive Chip Design

Join us for an informative webinar, as we unveil the capabilities of our cloud solutions designed to revolutionize EDA workloads. Whether you require completely hosted environments or need peak/burst capacity, our cloud solutions offer unparalleled flexibility and efficiency. We will discuss how Cadence Managed Cloud can optimize cost-efficiency and productivity for your chip design projects.… Read More »Cadence Managed Cloud for Cost Efficient and Productive Chip Design

AI-Driven EM-IR Design Closure

IR drop closure is becoming a major challenge for designers on advanced nodes. The number of violations at signoff has increased significantly, leading to longer turnaround time (TAT) or violations being waived. To solve this challenge, IR drop needs to be addressed early in the implementation phase with an automated IR prevention and fixing methodology.… Read More »AI-Driven EM-IR Design Closure

Embedded Vision Summit 2024

Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United States

The Summit attracts a global audience of technology professionals from companies developing computer vision and edge AI-enabled products including embedded systems, cloud solutions and mobile applications. Why Attend? It's a First-Rate Program with Powerful Insights into Practical Perceptual AI. Join us for three days of learning—from tutorials to Deep-Dive Day, covering the latest technical insights,… Read More »Embedded Vision Summit 2024

Verification Futures Conference 2024 UK

The Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for end-users to define their current and future verification challenges and collaborate with the vendors to create solutions. It also provides… Read More »Verification Futures Conference 2024 UK

DAC 2024

Moscone West San Francisco, CA, United States

The premier event for the design and design automation of electronic chips to systems. Autonomous Systems Electronics content in modern autonomous systems (e.g., automotive, robotics, drones, etc.) is growing at an increasingly rapid pace. Nearly every aspect of these complex systems uses smart electronics and embedded software to make our experiences safer, more energy-efficient and enjoyable. For… Read More »DAC 2024

DVCon Europe 2024

Holiday Inn Munich - City Centre Hochstraße 3, Munich, Germany

The Design and Verification Conference in Europe (DVCon Europe) is the leading European event covering the application of languages, tools, and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques,… Read More »DVCon Europe 2024