ORConf 2024
Our 10th ORConf! The FOSSi Foundation is proud to announce the 10th installment of ORConf, a conference dedicated to free and open source silicon to be held over the weekend of Friday September 13 to… ORConf 2024
DFT for chiplets & 3D ICs using Tessent Multi-die
3D IC (2.5D/3D) designs are on the rise. Design for Test (DFT) for chiplets must be general purpose so they can be tested stand alone and easy to test after assembly into 2.5D or 3D… DFT for chiplets & 3D ICs using Tessent Multi-die
Latest Innovations and Updates in ASICs
In this webinar Jeff DiCorpo & Matt Venn will delve into the latest ASIC developments, including the game-changing OpenFrame – a new Caravel version expanding your design possibilities by 50%. Topics Include: – OpenFrame –… Latest Innovations and Updates in ASICs
CHIPS Alliance – FuseSOC: Package manager and build abstraction tool for FPGA/ASIC development
IP share and reuse is fundamental for efficient chip design. But in order to do this efficiently we need tools and methods. On the software side, the concept of package managers is widely used to… CHIPS Alliance – FuseSOC: Package manager and build abstraction tool for FPGA/ASIC development
Latch-Up 2023
The FOSSi Foundation is proud to announce Latch-Up, a conference dedicated to free and open source silicon to be held over the weekend of Friday, March 31 to Sunday, April 2, 2023 in Santa Barbara, California, USA.… Latch-Up 2023
How Designing a Custom ASIC Chip Will Help Scientists Detect Neutrinos From Outer Space
Join us on Thursday, November 3rd to learn how Lawrence Berkeley National Laboratory, Fermilab, and Brookhaven National Laboratory collaborated and designed a custom ASIC chip to run at extremely cold temperatures, so that it can… How Designing a Custom ASIC Chip Will Help Scientists Detect Neutrinos From Outer Space