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Mirabilis, November 14, 2024

Optimize Systems and Semiconductor Architecture for Deep Learning Algorithms Using System-Level Modeling

In a world where artificial intelligence and machine learning are embedded in critical applications—from real-time tracking and object detection to autonomous systems—the architecture behind these innovations must be both powerful and efficient. To help engineers… Optimize Systems and Semiconductor Architecture for Deep Learning Algorithms Using System-Level Modeling

Mirabilis, May 9, 2024 - USA

Cracking the Power Code: Innovative Approach to SoC Power Optimization

Power is the biggest factor impacting semiconductors from custom silicon to CPU/GPU products. System-level Power modeling and simulation is needed to measure power accurately and efficiently. The scope of power studies has expanded to include… Cracking the Power Code: Innovative Approach to SoC Power Optimization

Mirabilis, May 9, 2024

Innovative Approach to SoC Power Optimization

Power is the biggest factor impacting semiconductors from custom silicon to CPU/GPU products. System-level Power modeling and simulation is needed to measure power accurately and efficiently. The scope of power studies has expanded to include… Innovative Approach to SoC Power Optimization

Mirabilis, 18 April 2024

Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP

Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the chiplet-based SoC requires multiple interconnect protocol models, and multiple coherent… Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP