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Innovative Approach to SoC Power Optimization
May 9 @ 3:00 pm - 4:00 pm JST
Power is the biggest factor impacting semiconductors from custom silicon to CPU/GPU products. System-level Power modeling and simulation is needed to measure power accurately and efficiently. The scope of power studies has expanded to include the software, thermal and generation to feed into the UVM/UPF methodology. At this Webinar we will highlight a new system-level power methodology that integrates micro-architecture power storage, consumption, management and thermal assessments. Case studies will be presented on Chiplet power, mapping strategy of DNN on AI Engines and Tensor cores, hardware-software partitioning, and testing power management for mobile and low-power devices.