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Synopsys, September 5, 2024

Synopsys Processor IP Summit 2024: RISC-V, DSP and NPU IP for Your Diverse SoC Processing Needs

As electronic systems continue to become more complex and integrate greater functionality, SoC developers are faced with the challenge of developing more powerful, yet more energy-efficient devices. The processors used in these applications must be… 

Synopsys, May 22, 2024

Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

The revolution in AI triggers an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the AI application domain, often starting from a baseline such as the… 

Synopsys, November 30, 2022

Formal Validation of a Datapath Pipelined Design with VC Formal

Finite Impulse Response (FIR) filters are widely used in communication, consumer electronics, and many other digital signal process (DSP) applications. A FIR filter includes a complex pipelined datapath based on arithmetic functions such as multipliers…